X-Git-Url: http://v3vee.org/palacios/gitweb/gitweb.cgi?a=blobdiff_plain;f=palacios%2Finclude%2Fdevices%2Fpci.h;h=bbb61c50f022cded5653fcaaa5666f351bc04b7d;hb=60ad6a41c6d0ee08ed689e8505eb0c3df0c2a289;hp=2154ade5aa91c032868afa73d6363ffe14391f0b;hpb=3938dc8f325981eab29bda77f43fa1be1d91c54f;p=palacios.git

diff --git a/palacios/include/devices/pci.h b/palacios/include/devices/pci.h
index 2154ade..bbb61c5 100644
--- a/palacios/include/devices/pci.h
+++ b/palacios/include/devices/pci.h
@@ -178,6 +178,12 @@ int v3_pci_set_irq_bridge(struct vm_device * pci_bus, int bus_num,
 			  void * dev_data);
 
 
+/* Raising a PCI IRQ requires the specification of a vector index. 
+ *  If you are not sure, set vec_index to 0. 
+ * For IntX IRQs, the index is the interrupt line the device is using (INTA=0, INTB=1, ...) - only used in multi-function devices
+ * For MSI and MSIX, the index is the vector index if multi-vectors are enabled  
+ */
+
 int v3_pci_raise_irq(struct vm_device * pci_bus, struct pci_device * dev, uint32_t vec_index);
 int v3_pci_lower_irq(struct vm_device * pci_bus, struct pci_device * dev, uint32_t vec_index);
 
@@ -215,11 +221,11 @@ int v3_pci_hook_config_range(struct pci_device * pci,
 
 typedef enum { PCI_CAP_INVALID = 0, 
 	       PCI_CAP_PM = 0x1,
-	       PCI_CAP_MSI = 0x5,
+ 	       PCI_CAP_MSI = 0x5,
 	       PCI_CAP_MSIX = 0x11,
                PCI_CAP_PCIE = 0x10 } pci_cap_type_t;
 
-int v3_pci_enable_capability(struct pci_device * pci, pci_cap_type_t cap_type, int mask);
+int v3_pci_enable_capability(struct pci_device * pci, pci_cap_type_t cap_type);
 
 
 #endif