X-Git-Url: http://v3vee.org/palacios/gitweb/gitweb.cgi?a=blobdiff_plain;f=palacios%2Finclude%2Fdevices%2Fpci.h;h=18f1fdca4d0542efac17a73cf3b27760f5a7660f;hb=abe79f30c8babe9d9e3989cf4a61ae4f3b5ce7e9;hp=9e329b817f13f998f63f3ca03d02db55c912052d;hpb=afb2a35b2e15ba0fa932c4e49a3678f958a4502a;p=palacios.git

diff --git a/palacios/include/devices/pci.h b/palacios/include/devices/pci.h
index 9e329b8..18f1fdc 100644
--- a/palacios/include/devices/pci.h
+++ b/palacios/include/devices/pci.h
@@ -31,6 +31,9 @@
 #include <devices/pci_types.h>
 
 
+struct vm_device;
+
+
 typedef enum { PCI_BAR_IO, 
 	       PCI_BAR_MEM24, 
 	       PCI_BAR_MEM32, 
@@ -57,15 +60,15 @@ struct v3_pci_bar {
 	struct {
 	    int num_pages;
 	    addr_t default_base_addr;
-	    int (*mem_read)(addr_t guest_addr, void * dst, uint_t length, void * private_data);
-	    int (*mem_write)(addr_t guest_addr, void * src, uint_t length, void * private_data);
+	    int (*mem_read)(struct guest_info * core, addr_t guest_addr, void * dst, uint_t length, void * private_data);
+	    int (*mem_write)(struct guest_info * core, addr_t guest_addr, void * src, uint_t length, void * private_data);
 	};
 
 	struct {
 	    int num_ports;
 	    uint16_t default_base_port;
-	    int (*io_read)(ushort_t port, void * dst, uint_t length, void * private_data);
-	    int (*io_write)(ushort_t port, void * src, uint_t length, void * private_data);
+	    int (*io_read)(struct guest_info * core, uint16_t port, void * src, uint_t length, void * private_data);
+	    int (*io_write)(struct guest_info * core, uint16_t port, void * src, uint_t length, void * private_data);
 	};
 	
 	struct {
@@ -87,9 +90,22 @@ struct v3_pci_bar {
 #define PCI_MEM_MASK 0xfffffff0
 #define PCI_MEM24_MASK 0x000ffff0
 
+//Zheng 03/15/2010
+#define PCI_MEM64_HIGH_MASK32 0xffffffff
+#define PCI_MEM64_HIGH_MASK64 0xffffffff00000000
+#define PCI_MEM64_MASK 0xfffffffffffffff0
+#define PCI_EXP_ROM_BASE_MASK 0xfffff800
+
 #define PCI_IO_BASE(bar_val) (bar_val & PCI_IO_MASK)
 #define PCI_MEM32_BASE(bar_val) (bar_val & PCI_MEM_MASK)
 #define PCI_MEM24_BASE(bar_val) (bar_val & PCI_MEM24_MASK)
+//Zheng 03/15/2010
+#define PCI_MEM64_BASE_HIGH(bar_val) (bar_val & PCI_MEM64_HIGH_MASK32)
+#define PCI_MEM64_BASE(mem64_bar_val) ((mem64_bar_val) & PCI_MEM64_MASK)
+#define PCI_EXP_ROM_BASE(exp_rom_base_val) (exp_rom_base_val & PCI_EXP_ROM_BASE_MASK)
+
+//Zheng 03/15/2010
+#define PCI_MEM64_BASE_HIGH_SHIFT 32
 
 struct pci_device {