X-Git-Url: http://v3vee.org/palacios/gitweb/gitweb.cgi?a=blobdiff_plain;f=linux_module%2Fiface-pmu.c;h=990fb2942a5430313876e3f2ec8a745741f460a1;hb=4a8f339db9b852ccd1d4d785906ef71b6b848350;hp=1f0f4591cd08d1680e3876bc5ea40cad4091e8b4;hpb=a24e987112d3807a784b3e9599b2dceb9c6b3481;p=palacios.git

diff --git a/linux_module/iface-pmu.c b/linux_module/iface-pmu.c
index 1f0f459..990fb29 100644
--- a/linux_module/iface-pmu.c
+++ b/linux_module/iface-pmu.c
@@ -39,7 +39,7 @@ static DEFINE_PER_CPU(u32, pmu_refcount) = 0;
 
 static inline void cpuid_string(u32 id, u32 dest[4]) {
   asm volatile("cpuid"
-	       :"=a"(dest),"=b"(*(dest+1)),"=c"(*(dest+2)),"=d"(*(dest+3))
+	       :"=a"(*dest),"=b"(*(dest+1)),"=c"(*(dest+2)),"=d"(*(dest+3))
 	       :"a"(id));
 }
 
@@ -427,14 +427,14 @@ static uint64_t amd_get_value(v3_pmon_ctr_t ctr) {
     }
     break;
   case V3_PMON_MEM_LOAD_COUNT:
-    if((ctr_idx = amd_find_idx(AMD_PREFETCH_INST_DISPATCHED, AMD_LOAD)) >= 0) {
+    if((ctr_idx = amd_find_idx(AMD_DATA_CACHE_ACCESSES, 0x0)) >= 0) {
       AMD_CTR_READ(count, ctr_idx);
     } else {
       goto AMD_READ_FAILED;
     }
     break;
   case V3_PMON_MEM_STORE_COUNT:
-    if((ctr_idx = amd_find_idx(AMD_PREFETCH_INST_DISPATCHED, AMD_STORE)) >= 0) {
+    if((ctr_idx = amd_find_idx(AMD_DATA_CACHE_ACCESSES, 0x0)) >= 0) {
       AMD_CTR_READ(count, ctr_idx);
     } else {
       goto AMD_READ_FAILED;
@@ -448,7 +448,7 @@ static uint64_t amd_get_value(v3_pmon_ctr_t ctr) {
     }
     break;
   case V3_PMON_TLB_MISS_COUNT:
-    if((ctr_idx = amd_find_idx(AMD_L1_DTLB_AND_L2_DTLB_MISS, 0x0)) >= 0) {
+    if((ctr_idx = amd_find_idx(AMD_L1_DTLB_AND_L2_DTLB_MISS, 0x7)) >= 0) {
       AMD_CTR_READ(count, ctr_idx);
     } else {
       goto AMD_READ_FAILED;
@@ -483,14 +483,14 @@ static int amd_start_tracking(v3_pmon_ctr_t ctr) {
     break;
   case V3_PMON_MEM_LOAD_COUNT:
     if((ctr_idx = amd_get_slot()) >= 0) {
-      AMD_CTRL_START(AMD_PREFETCH_INST_DISPATCHED, AMD_LOAD, ctr_idx);
+      AMD_CTRL_START(AMD_DATA_CACHE_ACCESSES, 0x0, ctr_idx);
     } else {
       goto AMD_START_FAILED;
     }
     break;
   case V3_PMON_MEM_STORE_COUNT:
     if((ctr_idx = amd_get_slot()) >= 0) {
-      AMD_CTRL_START(AMD_PREFETCH_INST_DISPATCHED, AMD_STORE, ctr_idx);
+      AMD_CTRL_START(AMD_DATA_CACHE_ACCESSES, 0x0, ctr_idx);
     } else {
       goto AMD_START_FAILED;
     }
@@ -504,7 +504,7 @@ static int amd_start_tracking(v3_pmon_ctr_t ctr) {
     break;
   case V3_PMON_TLB_MISS_COUNT:
     if((ctr_idx = amd_get_slot()) >= 0) {
-      AMD_CTRL_START(AMD_L1_DTLB_AND_L2_DTLB_MISS, 0x0, ctr_idx);
+      AMD_CTRL_START(AMD_L1_DTLB_AND_L2_DTLB_MISS, 0x7, ctr_idx);
     } else {
       goto AMD_START_FAILED;
     }
@@ -540,14 +540,14 @@ static int amd_stop_tracking(v3_pmon_ctr_t ctr) {
     }
     break;
   case V3_PMON_MEM_LOAD_COUNT:
-    if((ctr_idx = amd_find_idx(AMD_PREFETCH_INST_DISPATCHED, AMD_LOAD)) >= 0) {
+    if((ctr_idx = amd_find_idx(AMD_DATA_CACHE_ACCESSES, 0x0)) >= 0) {
       AMD_CTRL_STOP(ctr_idx);
     } else {
       goto AMD_STOP_FAILED;
     }
     break;
   case V3_PMON_MEM_STORE_COUNT:
-    if((ctr_idx = amd_find_idx(AMD_PREFETCH_INST_DISPATCHED, AMD_STORE)) >= 0) {
+    if((ctr_idx = amd_find_idx(AMD_DATA_CACHE_ACCESSES, 0x0)) >= 0) {
       AMD_CTRL_STOP(ctr_idx);
     } else {
       goto AMD_STOP_FAILED;
@@ -561,7 +561,7 @@ static int amd_stop_tracking(v3_pmon_ctr_t ctr) {
     }
     break;
   case V3_PMON_TLB_MISS_COUNT:
-    if((ctr_idx = amd_find_idx(AMD_L1_DTLB_AND_L2_DTLB_MISS, 0x0)) >= 0) {
+    if((ctr_idx = amd_find_idx(AMD_L1_DTLB_AND_L2_DTLB_MISS, 0x7)) >= 0) {
       AMD_CTRL_STOP(ctr_idx);
     } else {
       goto AMD_STOP_FAILED;
@@ -644,11 +644,17 @@ static int pmu_init( void ) {
   return 0;
 }
 
+static int pmu_deinit(void)
+{
+    // nothing
+    return 0;
+}
+
 
 static struct linux_ext pmu_ext = {
   .name = "PMU",
   .init = pmu_init,
-  .deinit = NULL,
+  .deinit = pmu_deinit,
   .guest_init = NULL,
   .guest_deinit = NULL
 };