PrintDebug("CPU Yield\n");
while (!v3_intr_pending(info)) {
- /* Since we're in an exit, time is already paused here, so no need to pause again. */
- // V3_Print("palacios: halt->yield\n");
-
+ uint64_t t, cycles;
+ /* Yield, allowing time to pass while yielded */
+ t = v3_get_host_time(&info->time_state);
v3_yield(info);
-
- v3_disable_ints();
+ cycles = v3_get_host_time(&info->time_state) - t;
+ v3_advance_time(info, &cycles);
+
v3_update_timers(info);
- v3_enable_ints();
/* At this point, we either have some combination of
interrupts, including perhaps a timer interrupt, or
/* if no interrupt, then we do halt */
/* asm("hlt"); */
}
+
}
- V3_Print("palacios: done with halt\n");
+ /* V3_Print("palacios: done with halt\n"); */
info->rip += 1;
}