moved internal memory map routines over to new flags structure instead of the hardcod...

[palacios.releases.git] / palacios / src / palacios / vmm_direct_paging_32pae.h

diff --git a/palacios/src/palacios/vmm_direct_paging_32pae.h b/palacios/src/palacios/vmm_direct_paging_32pae.h
index 27cc9b3..7ce823f 100644 (file)
--- a/palacios/src/palacios/vmm_direct_paging_32pae.h
+++ b/palacios/src/palacios/vmm_direct_paging_32pae.h
@@ -40,16 +40,15 @@ static inline int handle_passthrough_pagefault_32pae(struct guest_info * info,
     int pde_index = PDE32PAE_INDEX(fault_addr);
     int pte_index = PTE32PAE_INDEX(fault_addr);
 
-    struct v3_shadow_region * region =  v3_get_shadow_region(info, fault_addr);
+    struct v3_shadow_region * region =  v3_get_shadow_region(info->vm_info, info->cpu_id, fault_addr);
   
-    if ((region == NULL) || 
-       (region->host_type == SHDW_REGION_INVALID)) {
+    if (region == NULL) {
        PrintError("Invalid region in passthrough page fault 32PAE, addr=%p\n", 
                   (void *)fault_addr);
        return -1;
     }
 
-    host_addr = v3_get_shadow_addr(region, fault_addr);
+    host_addr = v3_get_shadow_addr(region, info->cpu_id, fault_addr);
 
     // Lookup the correct PDPE address based on the PAGING MODE
     if (info->shdw_pg_mode == SHADOW_PAGING) {
@@ -104,7 +103,7 @@ static inline int handle_passthrough_pagefault_32pae(struct guest_info * info,
 
        } else if (region->host_type == SHDW_REGION_FULL_HOOK) {
            // trap all accesses
-           return v3_handle_mem_full_hook(info, fault_addr, fault_addr, region, error_code);
+           return v3_handle_mem_hook(info, fault_addr, fault_addr, region, error_code);
 
        } else {
            PrintError("Unknown Region Type...\n");
@@ -114,11 +113,56 @@ static inline int handle_passthrough_pagefault_32pae(struct guest_info * info,
    
     if ( (region->host_type == SHDW_REGION_WRITE_HOOK) && 
         (error_code.write == 1) ) {
-       return v3_handle_mem_wr_hook(info, fault_addr, fault_addr, region, error_code);
+       return v3_handle_mem_hook(info, fault_addr, fault_addr, region, error_code);
     }
 
     return 0;
 }
 
 
+static inline int invalidate_addr_32pae(struct guest_info * info, addr_t inv_addr) {
+    pdpe32pae_t * pdpe = NULL;
+    pde32pae_t * pde = NULL;
+    pte32pae_t * pte = NULL;
+
+
+    // TODO:
+    // Call INVLPGA
+
+    // clear the page table entry
+    int pdpe_index = PDPE32PAE_INDEX(inv_addr);
+    int pde_index = PDE32PAE_INDEX(inv_addr);
+    int pte_index = PTE32PAE_INDEX(inv_addr);
+
+    
+    // Lookup the correct PDE address based on the PAGING MODE
+    if (info->shdw_pg_mode == SHADOW_PAGING) {
+       pdpe = CR3_TO_PDPE32PAE_VA(info->ctrl_regs.cr3);
+    } else {
+       pdpe = CR3_TO_PDPE32PAE_VA(info->direct_map_pt);
+    }    
+
+
+    if (pdpe[pdpe_index].present == 0) {
+       return 0;
+    }
+
+    pde = V3_VAddr((void*)BASE_TO_PAGE_ADDR(pdpe[pdpe_index].pd_base_addr));
+
+    if (pde[pde_index].present == 0) {
+       return 0;
+    } else if (pde[pde_index].large_page) {
+       pde[pde_index].present = 0;
+       return 0;
+    }
+
+    pte = V3_VAddr((void*)BASE_TO_PAGE_ADDR(pde[pde_index].pt_base_addr));
+
+    pte[pte_index].present = 0;
+
+    return 0;
+}
+
+
+
 #endif