#include <palacios/svm_io.h>
+
+// This is a global pointer to the host's VMCB
+static void * host_vmcb = NULL;
+
extern void v3_stgi();
extern void v3_clgi();
//extern int v3_svm_launch(vmcb_t * vmcb, struct v3_gprs * vm_regs, uint64_t * fs, uint64_t * gs);
-extern int v3_svm_launch(vmcb_t * vmcb, struct v3_gprs * vm_regs);
+extern int v3_svm_launch(vmcb_t * vmcb, struct v3_gprs * vm_regs, vmcb_t * host_vmcb);
static vmcb_t * Allocate_VMCB() {
return 0;
}
-
-
-// can we start a kernel thread here...
static int start_svm_guest(struct guest_info *info) {
- vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA((vmcb_t*)(info->vmm_data));
+ // vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA((vmcb_t*)(info->vmm_data));
// vmcb_ctrl_t * guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data));
uint_t num_exits = 0;
//PrintDebugVMCB((vmcb_t*)(info->vmm_data));
info->run_state = VM_RUNNING;
-
+ rdtscll(info->yield_start_cycle);
+
+
while (1) {
ullong_t tmp_tsc;
-
-#ifdef __V3_64BIT__
-
-#define MSR_LSTAR 0xc0000082
-#define MSR_CSTAR 0xc0000083
-#define MSR_SF_MASK 0xc0000084
-#define MSR_GS_BASE 0xc0000101
-#define MSR_KERNGS_BASE 0xc0000102
- struct v3_msr host_cstar;
- struct v3_msr host_lstar;
- struct v3_msr host_syscall_mask;
- struct v3_msr host_gs_base;
- struct v3_msr host_kerngs_base;
-
-#else
-
-#define MSR_SYSENTER_CS 0x00000174
-#define MSR_SYSENTER_ESP 0x00000175
-#define MSR_SYSENTER_EIP 0x00000176
-
- struct v3_msr host_sysenter_cs;
- struct v3_msr host_sysenter_esp;
- struct v3_msr host_sysenter_eip;
-
-#endif
-
-#define MSR_STAR 0xc0000081
- struct v3_msr host_star;
-
+ // Conditionally yield the CPU if the timeslice has expired
+ v3_yield_cond(info);
/*
PrintDebug("SVM Entry to CS=%p rip=%p...\n",
(void *)(addr_t)info->rip);
*/
+ // disable global interrupts for vm state transition
+
+ v3_clgi();
+
-#ifdef __V3_64BIT__
- v3_get_msr(MSR_SF_MASK, &(host_syscall_mask.hi), &(host_syscall_mask.lo));
- v3_get_msr(MSR_LSTAR, &(host_lstar.hi), &(host_lstar.lo));
- v3_get_msr(MSR_CSTAR, &(host_cstar.hi), &(host_cstar.lo));
- v3_get_msr(MSR_GS_BASE, &(host_gs_base.hi), &(host_gs_base.lo));
- v3_get_msr(MSR_KERNGS_BASE, &(host_kerngs_base.hi), &(host_kerngs_base.lo));
-#else
- v3_get_msr(MSR_SYSENTER_CS, &(host_sysenter_cs.hi), &(host_sysenter_cs.lo));
- v3_get_msr(MSR_SYSENTER_ESP, &(host_sysenter_esp.hi), &(host_sysenter_esp.lo));
- v3_get_msr(MSR_SYSENTER_EIP, &(host_sysenter_eip.hi), &(host_sysenter_eip.lo));
-#endif
- v3_get_msr(MSR_STAR, &(host_star.hi), &(host_star.lo));
rdtscll(info->time_state.cached_host_tsc);
// guest_ctrl->TSC_OFFSET = info->time_state.guest_tsc - info->time_state.cached_host_tsc;
- v3_svm_launch((vmcb_t*)V3_PAddr(info->vmm_data), &(info->vm_regs));
+ v3_svm_launch((vmcb_t*)V3_PAddr(info->vmm_data), &(info->vm_regs), (vmcb_t *)host_vmcb);
rdtscll(tmp_tsc);
-
-#ifdef __V3_64BIT__
- v3_set_msr(MSR_SF_MASK, host_syscall_mask.hi, host_syscall_mask.lo);
- v3_set_msr(MSR_LSTAR, host_lstar.hi, host_lstar.lo);
- v3_set_msr(MSR_CSTAR, host_cstar.hi, host_cstar.lo);
- v3_set_msr(MSR_GS_BASE, host_gs_base.hi, host_gs_base.lo);
- v3_set_msr(MSR_KERNGS_BASE, host_kerngs_base.hi, host_kerngs_base.lo);
-#else
- v3_set_msr(MSR_SYSENTER_CS, host_sysenter_cs.hi, host_sysenter_cs.lo);
- v3_set_msr(MSR_SYSENTER_ESP, host_sysenter_esp.hi, host_sysenter_esp.lo);
- v3_set_msr(MSR_SYSENTER_EIP, host_sysenter_eip.hi, host_sysenter_eip.lo);
-#endif
- v3_set_msr(MSR_STAR, host_star.hi, host_star.lo);
//PrintDebug("SVM Returned\n");
-
+ // reenable global interrupts after vm exit
+ v3_stgi();
v3_update_time(info, tmp_tsc - info->time_state.cached_host_tsc);
num_exits++;
-
- //PrintDebug("Turning on global interrupts\n");
- v3_stgi();
- v3_clgi();
if ((num_exits % 5000) == 0) {
PrintDebug("SVM Exit number %d\n", num_exits);
}
}
-
+ // Conditionally yield the CPU if the timeslice has expired
+ v3_yield_cond(info);
+
if (v3_handle_svm_exit(info) != 0) {
vmcb_ctrl_t * guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data));
addr_t host_addr;
PrintDebug("SVM ERROR!!\n");
- PrintDebug("RIP: %p\n", (void *)(addr_t)(guest_state->rip));
-
-
- linear_addr = get_addr_linear(info, guest_state->rip, &(info->segments.cs));
-
-
- PrintDebug("RIP Linear: %p\n", (void *)linear_addr);
- v3_print_segments(info);
- v3_print_ctrl_regs(info);
- if (info->shdw_pg_mode == SHADOW_PAGING) {
- PrintDebug("Shadow Paging Guest Registers:\n");
- PrintDebug("\tGuest CR0=%p\n", (void *)(addr_t)(info->shdw_pg_state.guest_cr0));
- PrintDebug("\tGuest CR3=%p\n", (void *)(addr_t)(info->shdw_pg_state.guest_cr3));
- PrintDebug("\tGuest EFER=%p\n", (void *)(addr_t)(info->shdw_pg_state.guest_efer.value));
- // CR4
- }
- v3_print_GPRs(info);
+ v3_print_guest_state(info);
PrintDebug("SVM Exit Code: %p\n", (void *)(addr_t)guest_ctrl->exit_code);
PrintDebug("exit_info2 low = 0x%.8x\n", *(uint_t*)&(guest_ctrl->exit_info2));
PrintDebug("exit_info2 high = 0x%.8x\n", *(uint_t *)(((uchar_t *)&(guest_ctrl->exit_info2)) + 4));
+ linear_addr = get_addr_linear(info, info->rip, &(info->segments.cs));
+
if (info->mem_mode == PHYSICAL_MEM) {
guest_pa_to_host_va(info, linear_addr, &host_addr);
} else if (info->mem_mode == VIRTUAL_MEM) {
guest_va_to_host_va(info, linear_addr, &host_addr);
}
-
PrintDebug("Host Address of rip = 0x%p\n", (void *)host_addr);
PrintDebug("Instr (15 bytes) at %p:\n", (void *)host_addr);
uint_t vm_cr_low = 0, vm_cr_high = 0;
addr_t eax = 0, ebx = 0, ecx = 0, edx = 0;
- v3_cpuid(CPUID_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
+ v3_cpuid(CPUID_EXT_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
- PrintDebug("CPUID_FEATURE_IDS_ecx=%p\n", (void *)ecx);
+ PrintDebug("CPUID_EXT_FEATURE_IDS_ecx=%p\n", (void *)ecx);
- if ((ecx & CPUID_FEATURE_IDS_ecx_svm_avail) == 0) {
+ if ((ecx & CPUID_EXT_FEATURE_IDS_ecx_svm_avail) == 0) {
PrintDebug("SVM Not Available\n");
return 0;
} else {
v3_cpuid(CPUID_SVM_REV_AND_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
- PrintDebug("CPUID_FEATURE_IDS_edx=%p\n", (void *)edx);
+ PrintDebug("CPUID_SVM_REV_AND_FEATURE_IDS_edx=%p\n", (void *)edx);
if ((edx & CPUID_SVM_REV_AND_FEATURE_IDS_edx_svml) == 0) {
PrintDebug("SVM BIOS Disabled, not unlockable\n");
PrintDebug("SVM is available and enabled.\n");
v3_cpuid(CPUID_SVM_REV_AND_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
- PrintDebug("CPUID_FEATURE_IDS_eax=%p\n", (void *)eax);
- PrintDebug("CPUID_FEATURE_IDS_ebx=%p\n", (void *)ebx);
- PrintDebug("CPUID_FEATURE_IDS_ecx=%p\n", (void *)ecx);
- PrintDebug("CPUID_FEATURE_IDS_edx=%p\n", (void *)edx);
+ PrintDebug("CPUID_SVM_REV_AND_FEATURE_IDS_eax=%p\n", (void *)eax);
+ PrintDebug("CPUID_SVM_REV_AND_FEATURE_IDS_ebx=%p\n", (void *)ebx);
+ PrintDebug("CPUID_SVM_REV_AND_FEATURE_IDS_ecx=%p\n", (void *)ecx);
+ PrintDebug("CPUID_SVM_REV_AND_FEATURE_IDS_edx=%p\n", (void *)edx);
if ((edx & CPUID_SVM_REV_AND_FEATURE_IDS_edx_np) == 0) {
v3_cpuid(CPUID_SVM_REV_AND_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
- //PrintDebug("CPUID_FEATURE_IDS_edx=0x%x\n", edx);
+ //PrintDebug("CPUID_EXT_FEATURE_IDS_edx=0x%x\n", edx);
if ((edx & CPUID_SVM_REV_AND_FEATURE_IDS_edx_np) == 0) {
PrintDebug("SVM Nested Paging not supported\n");
void v3_init_SVM(struct v3_ctrl_ops * vmm_ops) {
reg_ex_t msr;
- void * host_state;
extern v3_cpu_arch_t v3_cpu_type;
// Enable SVM on the CPU
PrintDebug("SVM Enabled\n");
-
// Setup the host state save area
- host_state = V3_AllocPages(4);
-
+ host_vmcb = V3_AllocPages(4);
/* 64-BIT-ISSUE */
// msr.e_reg.high = 0;
- //msr.e_reg.low = (uint_t)host_state;
- msr.r_reg = (addr_t)host_state;
+ //msr.e_reg.low = (uint_t)host_vmcb;
+ msr.r_reg = (addr_t)host_vmcb;
- PrintDebug("Host State being saved at %p\n", (void *)(addr_t)host_state);
+ PrintDebug("Host State being saved at %p\n", (void *)(addr_t)host_vmcb);
v3_set_msr(SVM_VM_HSAVE_PA_MSR, msr.e_reg.high, msr.e_reg.low);
+ /*
+ * Test VMSAVE/VMLOAD Latency
+ */
+#define vmsave ".byte 0x0F,0x01,0xDB ; "
+#define vmload ".byte 0x0F,0x01,0xDA ; "
+ {
+ uint32_t start_lo, start_hi;
+ uint32_t end_lo, end_hi;
+ uint64_t start, end;
+
+ __asm__ __volatile__ (
+ "rdtsc ; "
+ "movl %%eax, %%esi ; "
+ "movl %%edx, %%edi ; "
+ "movq %%rcx, %%rax ; "
+ vmsave
+ "rdtsc ; "
+ : "=D"(start_hi), "=S"(start_lo), "=a"(end_lo),"=d"(end_hi)
+ : "c"(host_vmcb), "0"(0), "1"(0), "2"(0), "3"(0)
+ );
+
+ start = start_hi;
+ start <<= 32;
+ start += start_lo;
+
+ end = end_hi;
+ end <<= 32;
+ end += end_lo;
+
+ PrintDebug("VMSave Cycle Latency: %d\n", (uint32_t)(end - start));
+
+ __asm__ __volatile__ (
+ "rdtsc ; "
+ "movl %%eax, %%esi ; "
+ "movl %%edx, %%edi ; "
+ "movq %%rcx, %%rax ; "
+ vmload
+ "rdtsc ; "
+ : "=D"(start_hi), "=S"(start_lo), "=a"(end_lo),"=d"(end_hi)
+ : "c"(host_vmcb), "0"(0), "1"(0), "2"(0), "3"(0)
+ );
+
+ start = start_hi;
+ start <<= 32;
+ start += start_lo;
+
+ end = end_hi;
+ end <<= 32;
+ end += end_lo;
+
+
+ PrintDebug("VMLoad Cycle Latency: %d\n", (uint32_t)(end - start));
+ }
+ /* End Latency Test */
+
if (has_svm_nested_paging() == 1) {
v3_cpu_type = V3_SVM_REV3_CPU;
} else {