+/*
+ * This file is part of the Palacios Virtual Machine Monitor developed
+ * by the V3VEE Project with funding from the United States National
+ * Science Foundation and the Department of Energy.
+ *
+ * The V3VEE Project is a joint project between Northwestern University
+ * and the University of New Mexico. You can find out more at
+ * http://www.v3vee.org
+ *
+ * Copyright (c) 2008, Jack Lange <jarusl@cs.northwestern.edu>
+ * Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org>
+ * All rights reserved.
+ *
+ * Author: Jack Lange <jarusl@cs.northwestern.edu>
+ *
+ * This is free software. You are permitted to use,
+ * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
+ */
+
+
+
+
+
#include <palacios/svm.h>
#include <palacios/vmm.h>
#include <palacios/vm_guest_mem.h>
#include <palacios/vmm_decoder.h>
+#include <palacios/vmm_string.h>
+#include <palacios/vmm_lowlevel.h>
-
-extern uint_t cpuid_ecx(uint_t op);
-extern uint_t cpuid_edx(uint_t op);
-extern void Get_MSR(uint_t MSR, uint_t * high_byte, uint_t * low_byte);
-extern void Set_MSR(uint_t MSR, uint_t high_byte, uint_t low_byte);
-extern uint_t launch_svm(vmcb_t * vmcb_addr);
-extern void safe_svm_launch(vmcb_t * vmcb_addr, struct v3_gprs * gprs);
-
-extern void STGI();
-extern void CLGI();
-
extern uint_t Get_CR3();
-extern void DisableInts();
-extern void EnableInts();
-
-
+extern void v3_stgi();
+extern void v3_clgi();
+extern int v3_svm_launch(vmcb_t * vmcb, struct v3_gprs * vm_regs);
static vmcb_t * Allocate_VMCB() {
vmcb_t * vmcb_page = (vmcb_t *)V3_AllocPages(1);
-
memset(vmcb_page, 0, 4096);
return vmcb_page;
uchar_t * bitmap = (uchar_t *)io_port_bitmap;
bitmap += (port / 8);
- PrintDebug("Setting Bit for port 0x%x\n", port);
+ // PrintDebug("Setting Bit for port 0x%x\n", port);
*bitmap |= 1 << (port % 8);
}
// can we start a kernel thread here...
- int start_svm_guest(struct guest_info *info) {
+static int start_svm_guest(struct guest_info *info) {
vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA((vmcb_t*)(info->vmm_data));
vmcb_ctrl_t * guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data));
uint_t num_exits = 0;
ullong_t tmp_tsc;
- EnableInts();
- CLGI();
+ v3_enable_ints();
+ v3_clgi();
// PrintDebug("SVM Entry to rip=%x...\n", info->rip);
rdtscll(info->time_state.cached_host_tsc);
guest_ctrl->TSC_OFFSET = info->time_state.guest_tsc - info->time_state.cached_host_tsc;
- safe_svm_launch((vmcb_t*)(info->vmm_data), &(info->vm_regs));
+ v3_svm_launch((vmcb_t*)(info->vmm_data), &(info->vm_regs));
rdtscll(tmp_tsc);
//PrintDebug("SVM Returned\n");
v3_update_time(info, tmp_tsc - info->time_state.cached_host_tsc);
num_exits++;
- STGI();
+ v3_stgi();
if ((num_exits % 25) == 0) {
PrintDebug("SVM Exit number %d\n", num_exits);
}
- if (handle_svm_exit(info) != 0) {
+ if (v3_handle_svm_exit(info) != 0) {
addr_t host_addr;
addr_t linear_addr = 0;
PrintDebug("RIP Linear: %x\n", linear_addr);
- PrintV3Segments(info);
- PrintV3CtrlRegs(info);
- PrintV3GPRs(info);
+ v3_print_segments(info);
+ v3_print_ctrl_regs(info);
+ v3_print_GPRs(info);
if (info->mem_mode == PHYSICAL_MEM) {
guest_pa_to_host_pa(info, linear_addr, &host_addr);
PrintDebug("Host Address of rip = 0x%x\n", host_addr);
PrintDebug("Instr (15 bytes) at %x:\n", host_addr);
- PrintTraceMemDump((char*)host_addr, 15);
+ PrintTraceMemDump((uchar_t *)host_addr, 15);
break;
}
/* Checks machine SVM capability */
/* Implemented from: AMD Arch Manual 3, sect 15.4 */
-int is_svm_capable() {
+int v3_is_svm_capable() {
#if 1
// Dinda
-
- uint_t ret;
uint_t vm_cr_low = 0, vm_cr_high = 0;
+ uint_t eax = 0, ebx = 0, ecx = 0, edx = 0;
-
- ret = cpuid_ecx(CPUID_FEATURE_IDS);
+ v3_cpuid(CPUID_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
- PrintDebug("CPUID_FEATURE_IDS_ecx=0x%x\n",ret);
+ PrintDebug("CPUID_FEATURE_IDS_ecx=0x%x\n", ecx);
- if ((ret & CPUID_FEATURE_IDS_ecx_svm_avail) == 0) {
+ if ((ecx & CPUID_FEATURE_IDS_ecx_svm_avail) == 0) {
PrintDebug("SVM Not Available\n");
return 0;
} else {
- Get_MSR(SVM_VM_CR_MSR, &vm_cr_high, &vm_cr_low);
+ v3_get_msr(SVM_VM_CR_MSR, &vm_cr_high, &vm_cr_low);
- PrintDebug("SVM_VM_CR_MSR = 0x%x 0x%x\n",vm_cr_high,vm_cr_low);
+ PrintDebug("SVM_VM_CR_MSR = 0x%x 0x%x\n", vm_cr_high, vm_cr_low);
if ((vm_cr_low & SVM_VM_CR_MSR_svmdis) == 1) {
PrintDebug("SVM is available but is disabled.\n");
- ret = cpuid_edx(CPUID_SVM_REV_AND_FEATURE_IDS);
+ v3_cpuid(CPUID_SVM_REV_AND_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
- PrintDebug("CPUID_FEATURE_IDS_edx=0x%x\n",ret);
+ PrintDebug("CPUID_FEATURE_IDS_edx=0x%x\n", edx);
- if ((ret & CPUID_SVM_REV_AND_FEATURE_IDS_edx_svml) == 0) {
+ if ((edx & CPUID_SVM_REV_AND_FEATURE_IDS_edx_svml) == 0) {
PrintDebug("SVM BIOS Disabled, not unlockable\n");
} else {
PrintDebug("SVM is locked with a key\n");
} else {
PrintDebug("SVM is available and enabled.\n");
- ret = cpuid_edx(CPUID_SVM_REV_AND_FEATURE_IDS);
+ v3_cpuid(CPUID_SVM_REV_AND_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
- PrintDebug("CPUID_FEATURE_IDS_edx=0x%x\n",ret);
+ PrintDebug("CPUID_FEATURE_IDS_edx=0x%x\n", edx);
- if ((ret & CPUID_SVM_REV_AND_FEATURE_IDS_edx_np) == 0) {
+ if ((edx & CPUID_SVM_REV_AND_FEATURE_IDS_edx_np) == 0) {
PrintDebug("SVM Nested Paging not supported\n");
} else {
PrintDebug("SVM Nested Paging supported\n");
}
#else
-
- uint_t ret = cpuid_ecx(CPUID_FEATURE_IDS);
+ uint_t eax = 0, ebx = 0, ecx = 0, edx = 0;
uint_t vm_cr_low = 0, vm_cr_high = 0;
+ v3_cpuid(CPUID_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
- if ((ret & CPUID_FEATURE_IDS_ecx_svm_avail) == 0) {
+ if ((ecx & CPUID_FEATURE_IDS_ecx_svm_avail) == 0) {
PrintDebug("SVM Not Available\n");
return 0;
}
- Get_MSR(SVM_VM_CR_MSR, &vm_cr_high, &vm_cr_low);
+ v3_get_msr(SVM_VM_CR_MSR, &vm_cr_high, &vm_cr_low);
- PrintDebug("SVM_VM_CR_MSR = 0x%x 0x%x\n",vm_cr_high,vm_cr_low);
+ PrintDebug("SVM_VM_CR_MSR = 0x%x 0x%x\n", vm_cr_high, vm_cr_low);
// this part is clearly wrong, since the np bit is in
// edx, not ecx
- if ((ret & CPUID_SVM_REV_AND_FEATURE_IDS_edx_np) == 1) {
+ if ((edx & CPUID_SVM_REV_AND_FEATURE_IDS_edx_np) == 1) {
PrintDebug("Nested Paging not supported\n");
} else {
PrintDebug("Nested Paging supported\n");
return 1;
}
- ret = cpuid_edx(CPUID_SVM_REV_AND_FEATURE_IDS);
+ v3_cpuid(CPUID_SVM_REV_AND_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
- if ((ret & CPUID_SVM_REV_AND_FEATURE_IDS_edx_svml) == 0) {
+ if ((edx & CPUID_SVM_REV_AND_FEATURE_IDS_edx_svml) == 0) {
PrintDebug("SVM BIOS Disabled, not unlockable\n");
} else {
PrintDebug("SVM is locked with a key\n");
}
-int has_svm_nested_paging() {
- uint32_t ret;
+static int has_svm_nested_paging() {
+ uint_t eax = 0, ebx = 0, ecx = 0, edx = 0;
- ret = cpuid_edx(CPUID_SVM_REV_AND_FEATURE_IDS);
+ v3_cpuid(CPUID_SVM_REV_AND_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
- //PrintDebug("CPUID_FEATURE_IDS_edx=0x%x\n",ret);
+ //PrintDebug("CPUID_FEATURE_IDS_edx=0x%x\n", edx);
- if ((ret & CPUID_SVM_REV_AND_FEATURE_IDS_edx_np) == 0) {
+ if ((edx & CPUID_SVM_REV_AND_FEATURE_IDS_edx_np) == 0) {
PrintDebug("SVM Nested Paging not supported\n");
return 0;
} else {
-void Init_SVM(struct vmm_ctrl_ops * vmm_ops) {
+void v3_init_SVM(struct v3_ctrl_ops * vmm_ops) {
reg_ex_t msr;
void * host_state;
// Enable SVM on the CPU
- Get_MSR(EFER_MSR, &(msr.e_reg.high), &(msr.e_reg.low));
+ v3_get_msr(EFER_MSR, &(msr.e_reg.high), &(msr.e_reg.low));
msr.e_reg.low |= EFER_MSR_svm_enable;
- Set_MSR(EFER_MSR, 0, msr.e_reg.low);
+ v3_set_msr(EFER_MSR, 0, msr.e_reg.low);
PrintDebug("SVM Enabled\n");
// Setup the host state save area
host_state = V3_AllocPages(4);
- msr.e_reg.high = 0;
- msr.e_reg.low = (uint_t)host_state;
+ /* 64-BIT-ISSUE */
+ // msr.e_reg.high = 0;
+ //msr.e_reg.low = (uint_t)host_state;
+ msr.r_reg = (addr_t)host_state;
- PrintDebug("Host State being saved at %x\n", (uint_t)host_state);
- Set_MSR(SVM_VM_HSAVE_PA_MSR, msr.e_reg.high, msr.e_reg.low);
+ PrintDebug("Host State being saved at %x\n", (addr_t)host_state);
+ v3_set_msr(SVM_VM_HSAVE_PA_MSR, msr.e_reg.high, msr.e_reg.low);