}
-int v3_pci_enable_capability(struct pci_device * pci, pci_cap_type_t cap_type, int mask) {
+int v3_pci_enable_capability(struct pci_device * pci, pci_cap_type_t cap_type) {
uint32_t size = 0;
struct pci_cap * tmp_cap = NULL;
struct pci_cap * cap = NULL;
size = 8;
}
- if (mask) {
- V3_Print("Hooking capability range (offset=%d, size=%d)\n", cap->offset, size);
- if (v3_pci_hook_config_range(pci, cap->offset, size + 2,
- cap_write, NULL, cap) == -1) {
- PrintError("Could not hook config range (start=%d, size=%d)\n",
- cap->offset + 2, size);
- return -1;
- }
+ V3_Print("Hooking capability range (offset=%d, size=%d)\n", cap->offset, size);
+
+ if (v3_pci_hook_config_range(pci, cap->offset, size + 2,
+ cap_write, NULL, cap) == -1) {
+ PrintError("Could not hook config range (start=%d, size=%d)\n",
+ cap->offset + 2, size);
+ return -1;
}
+
// link it to the active capabilities list
pci->config_space[cap->offset + 1] = pci->config_header.cap_ptr;
pci->config_header.cap_ptr = cap->offset; // add to the head of the list
memset(&ipi, 0, sizeof(struct v3_gen_ipi));
+ // decode MSI fields into IPI
+
ipi.vector = data->vector + vec.irq;
ipi.mode = data->del_mode;
ipi.logical = addr->dst_mode;
ipi.dst_shorthand = 0;
ipi.dst = addr->dst_id;
- // decode MSI fields into IPI
-
- V3_Print("Decode MSI\n");
v3_apic_send_ipi(dev->vm, &ipi, dev->apic_dev);
data = &(msix_table->entries[vec.irq].data);
addr = &(msix_table->entries[vec.irq].addr);;
+ // decode MSIX fields into IPI
ipi.vector = data->vector + vec.irq;
ipi.mode = data->del_mode;
ipi.logical = addr->dst_mode;
ipi.dst_shorthand = 0;
ipi.dst = addr->dst_id;
- // decode MSIX fields into IPI
+
V3_Print("Decode MSIX\n");