#define NE2K_MEM_SIZE NE2K_PMEM_END
#define NIC_REG_BASE_PORT 0xc100 /* Command register (for all pages) */
-#define NIC_DATA_PORT 0xc110 /* Data read/write port */
-#define NIC_RESET_PORT 0xc11f /* Reset port */
+
+#define NE2K_CMD_OFFSET 0x00
+#define NE2K_DATA_OFFSET 0x10
+#define NE2K_RESET_OFFSET 0x1f
/* Page 0 registers */
#define EN0_CLDALO 0x01 /* Low byte of current local dma addr RD */
int ret;
switch (idx) {
- case NIC_REG_BASE_PORT:
+ case NE2K_CMD_OFFSET:
ret = ne2k_cmd_write(core, port, src, length, private_data);
break;
- case NIC_REG_BASE_PORT+1 ... NIC_REG_BASE_PORT+15:
+ case NE2K_CMD_OFFSET+1 ... NE2K_CMD_OFFSET+15:
ret = ne2k_std_write(core, port, src, length, private_data);
break;
- case NIC_DATA_PORT:
+ case NE2K_DATA_OFFSET:
ret = ne2k_data_write(core, port, src, length, private_data);
break;
- case NIC_RESET_PORT:
+ case NE2K_RESET_OFFSET:
ret = ne2k_reset_port_write(core, port, src, length, private_data);
break;
int ret;
switch (idx) {
- case NIC_REG_BASE_PORT:
+ case NE2K_CMD_OFFSET:
ret = ne2k_cmd_read(core, port, dst, length, private_data);
break;
- case NIC_REG_BASE_PORT+1 ... NIC_REG_BASE_PORT+15:
+ case NE2K_CMD_OFFSET+1 ... NE2K_CMD_OFFSET+15:
ret = ne2k_std_read(core, port, dst, length, private_data);
break;
- case NIC_DATA_PORT:
+ case NE2K_DATA_OFFSET:
ret = ne2k_data_read(core, port, dst, length, private_data);
break;
- case NIC_RESET_PORT:
+ case NE2K_RESET_OFFSET:
ret = ne2k_reset_port_read(core, port, dst, length, private_data);
break;
v3_dev_hook_io(nic_state->dev, NIC_REG_BASE_PORT + i, &ne2k_std_read, &ne2k_std_write);
}
- v3_dev_hook_io(nic_state->dev, NIC_DATA_PORT, &ne2k_data_read, &ne2k_data_write);
- v3_dev_hook_io(nic_state->dev, NIC_RESET_PORT, &ne2k_reset_port_read, &ne2k_reset_port_write);
+ v3_dev_hook_io(nic_state->dev, NIC_REG_BASE_PORT + NE2K_DATA_OFFSET, &ne2k_data_read, &ne2k_data_write);
+ v3_dev_hook_io(nic_state->dev, NIC_REG_BASE_PORT + NE2K_RESET_OFFSET, &ne2k_reset_port_read, &ne2k_reset_port_write);
}
v3_dev_unhook_io(nic_state->dev, NIC_REG_BASE_PORT + i);
}
- v3_dev_unhook_io(nic_state->dev, NIC_DATA_PORT);
- v3_dev_unhook_io(nic_state->dev, NIC_RESET_PORT);
+ v3_dev_unhook_io(nic_state->dev, NIC_REG_BASE_PORT + NE2K_DATA_OFFSET);
+ v3_dev_unhook_io(nic_state->dev, NIC_REG_BASE_PORT + NE2K_RESET_OFFSET);
}else {
/* unregistered from PCI? */
}