#include <devices/apic_regs.h>
#include <palacios/vmm.h>
#include <palacios/vmm_msr.h>
+#include <palacios/vm_guest.h>
-
-#ifndef DEBUG_APIC
+#ifndef CONFIG_DEBUG_APIC
#undef PrintDebug
#define PrintDebug(fmt, args...)
#endif
uint32_t tmr_init_cnt;
+ struct local_vec_tbl_reg ext_intr_vec_tbl[4];
uint32_t rem_rd_data;
};
+static int apic_read(addr_t guest_addr, void * dst, uint_t length, void * priv_data);
+static int apic_write(addr_t guest_addr, void * src, uint_t length, void * priv_data);
static void init_apic_state(struct apic_state * apic) {
apic->base_addr = DEFAULT_BASE_ADDR;
apic->lint1_vec_tbl.val = 0x00010000;
apic->err_vec_tbl.val = 0x00010000;
apic->tmr_div_cfg.val = 0x00000000;
+ //apic->ext_apic_feature.val = 0x00000007;
apic->ext_apic_feature.val = 0x00040007;
apic->ext_apic_ctrl.val = 0x00000000;
apic->spec_eoi.val = 0x00000000;
static int read_apic_msr(uint_t msr, v3_msr_t * dst, void * priv_data) {
struct vm_device * dev = (struct vm_device *)priv_data;
struct apic_state * apic = (struct apic_state *)dev->private_data;
- PrintError("READING APIC BASE ADDR: HI=%x LO=%x\n", apic->base_addr_msr.hi, apic->base_addr_msr.lo);
-
- return -1;
+ dst->value = apic->base_addr;
+ return 0;
}
static int write_apic_msr(uint_t msr, v3_msr_t src, void * priv_data) {
- // struct vm_device * dev = (struct vm_device *)priv_data;
- // struct apic_state * apic = (struct apic_state *)dev->private_data;
+ struct vm_device * dev = (struct vm_device *)priv_data;
+ struct apic_state * apic = (struct apic_state *)dev->private_data;
+ struct v3_shadow_region * old_reg = v3_get_shadow_region(dev->vm, apic->base_addr);
- PrintError("WRITING APIC BASE ADDR: HI=%x LO=%x\n", src.hi, src.lo);
+ if (old_reg == NULL) {
+ // uh oh...
+ PrintError("APIC Base address region does not exit...\n");
+ return -1;
+ }
+
+ v3_delete_shadow_region(dev->vm, old_reg);
- return -1;
+ apic->base_addr = src.value;
+
+ if (v3_hook_full_mem(dev->vm, apic->base_addr, apic->base_addr + PAGE_SIZE_4KB, apic_read, apic_write, dev) == -1) {
+ PrintError("Could not hook new APIC Base address\n");
+ return -1;
+ }
+
+ return 0;
}
PrintDebug("Raising APIC IRQ %d\n", irq_num);
+ if (*req_location & flag) {
+ V3_Print("Interrupts coallescing\n");
+ }
+
if (*en_location & flag) {
*req_location |= flag;
} else {
for (j = 7; j >= 0; j--) {
uchar_t flag = 0x1 << j;
if ((*svc_major) & flag) {
-
-
return ((i * 8) + j);
}
}
for (j = 7; j >= 0; j--) {
uchar_t flag = 0x1 << j;
if ((*req_major) & flag) {
-
-
return ((i * 8) + j);
}
}
uchar_t flag = 0x1 << minor_offset;
uchar_t * svc_location = apic->int_svc_reg + major_offset;
- PrintDebug("Received APIC EOI\n");
+ PrintDebug("Received APIC EOI for IRQ %d\n", isr_irq);
*svc_location &= ~flag;
-#ifdef CRAY_XT
+#ifdef CONFIG_CRAY_XT
if ((isr_irq == 238) ||
(isr_irq == 239)) {
// Unhandled Registers
case EXT_INT_LOC_VEC_TBL_OFFSET0:
+ val = apic->ext_intr_vec_tbl[0].val;
+ break;
case EXT_INT_LOC_VEC_TBL_OFFSET1:
+ val = apic->ext_intr_vec_tbl[1].val;
+ break;
case EXT_INT_LOC_VEC_TBL_OFFSET2:
+ val = apic->ext_intr_vec_tbl[2].val;
+ break;
case EXT_INT_LOC_VEC_TBL_OFFSET3:
+ val = apic->ext_intr_vec_tbl[3].val;
+ break;
+
+
case EXT_APIC_FEATURE_OFFSET:
case EXT_APIC_CMD_OFFSET:
case SEOI_OFFSET:
case IER_OFFSET7:
*(uint32_t *)(apic->int_en_reg + 28) = op_val;
break;
-
+
+ case EXT_INT_LOC_VEC_TBL_OFFSET0:
+ apic->ext_intr_vec_tbl[0].val = op_val;
+ break;
+ case EXT_INT_LOC_VEC_TBL_OFFSET1:
+ apic->ext_intr_vec_tbl[1].val = op_val;
+ break;
+ case EXT_INT_LOC_VEC_TBL_OFFSET2:
+ apic->ext_intr_vec_tbl[2].val = op_val;
+ break;
+ case EXT_INT_LOC_VEC_TBL_OFFSET3:
+ apic->ext_intr_vec_tbl[3].val = op_val;
+ break;
+
// Action Registers
case EOI_OFFSET:
case INT_CMD_LO_OFFSET:
case INT_CMD_HI_OFFSET:
// Unhandled Registers
- case EXT_INT_LOC_VEC_TBL_OFFSET0:
- case EXT_INT_LOC_VEC_TBL_OFFSET1:
- case EXT_INT_LOC_VEC_TBL_OFFSET2:
- case EXT_INT_LOC_VEC_TBL_OFFSET3:
+
case EXT_APIC_CMD_OFFSET:
case SEOI_OFFSET:
default:
/* Interrupt Controller Functions */
// returns 1 if an interrupt is pending, 0 otherwise
-static int apic_intr_pending(void * private_data) {
+static int apic_intr_pending(struct guest_info * info, void * private_data) {
struct vm_device * dev = (struct vm_device *)private_data;
struct apic_state * apic = (struct apic_state *)dev->private_data;
int req_irq = get_highest_irr(apic);
return 0;
}
-static int apic_get_intr_number(void * private_data) {
+static int apic_get_intr_number(struct guest_info * info, void * private_data) {
struct vm_device * dev = (struct vm_device *)private_data;
struct apic_state * apic = (struct apic_state *)dev->private_data;
int req_irq = get_highest_irr(apic);
return -1;
}
-static int apic_raise_intr(void * private_data, int irq) {
-#ifdef CRAY_XT
+static int apic_raise_intr(struct guest_info * info, void * private_data, int irq) {
+#ifdef CONFIG_CRAY_XT
// The Seastar is connected directly to the LAPIC via LINT0 on the ICC bus
if (irq == 238) {
return activate_apic_irq(apic, irq);
}
#endif
+
return 0;
}
-static int apic_lower_intr(void * private_data, int irq) {
+static int apic_lower_intr(struct guest_info * info, void * private_data, int irq) {
return 0;
}
-static int apic_begin_irq(void * private_data, int irq) {
+static int apic_begin_irq(struct guest_info * info, void * private_data, int irq) {
struct vm_device * dev = (struct vm_device *)private_data;
struct apic_state * apic = (struct apic_state *)dev->private_data;
int major_offset = (irq & ~0x00000007) >> 3;
*svc_location |= flag;
*req_location &= ~flag;
-#ifdef CRAY_XT
+#ifdef CONFIG_CRAY_XT
if ((irq == 238) || (irq == 239)) {
PrintError("APIC: Begin IRQ %d (ISR=%x), (IRR=%x)\n", irq, *svc_location, *req_location);
}
-int v3_apic_raise_intr(struct vm_device * apic_dev, int intr_num) {
+int v3_apic_raise_intr(struct guest_info * info, struct vm_device * apic_dev, int intr_num) {
struct apic_state * apic = (struct apic_state *)apic_dev->private_data;
- return activate_apic_irq(apic, intr_num);
+
+ if (activate_apic_irq(apic, intr_num) == -1) {
+ PrintError("Error: Could not activate apic_irq\n");
+ return -1;
+ }
+
+ v3_interrupt_cpu(info, 0);
+
+ return 0;
}
}
tmr_ticks = cpu_cycles >> shift_num;
- PrintDebug("Timer Ticks: %p\n", (void *)tmr_ticks);
+ // PrintDebug("Timer Ticks: %p\n", (void *)tmr_ticks);
if (tmr_ticks < apic->tmr_cur_cnt) {
apic->tmr_cur_cnt -= tmr_ticks;
PrintDebug("Raising APIC Timer interrupt (periodic=%d) (icnt=%d) (div=%d)\n",
apic->tmr_vec_tbl.tmr_mode, apic->tmr_init_cnt, shift_num);
+ if (apic_intr_pending(dev->vm, priv_data)) {
+ PrintDebug("Overriding pending IRQ %d\n", apic_get_intr_number(dev->vm, priv_data));
+ }
+
if (activate_internal_irq(apic, APIC_TMR_INT) == -1) {
PrintError("Could not raise Timer interrupt\n");
}
};
-static int apic_init(struct vm_device * dev) {
- struct guest_info * info = dev->vm;
- struct apic_state * apic = (struct apic_state *)(dev->private_data);
-
- v3_register_intr_controller(dev->vm, &intr_ops, dev);
- v3_add_timer(dev->vm, &timer_ops, dev);
-
- init_apic_state(apic);
-
- v3_hook_msr(info, BASE_ADDR_MSR, read_apic_msr, write_apic_msr, dev);
- v3_hook_full_mem(info, apic->base_addr, apic->base_addr + PAGE_SIZE_4KB, apic_read, apic_write, dev);
- return 0;
-}
-
-static int apic_deinit(struct vm_device * dev) {
+static int apic_free(struct vm_device * dev) {
struct guest_info * info = dev->vm;
v3_unhook_msr(info, BASE_ADDR_MSR);
}
-static struct vm_device_ops dev_ops = {
- .init = apic_init,
- .deinit = apic_deinit,
+static struct v3_device_ops dev_ops = {
+ .free = apic_free,
.reset = NULL,
.start = NULL,
.stop = NULL,
};
-struct vm_device * v3_create_apic() {
+
+static int apic_init(struct guest_info * vm, v3_cfg_tree_t * cfg) {
PrintDebug("Creating APIC\n");
+ char * name = v3_cfg_val(cfg, "name");
struct apic_state * apic = (struct apic_state *)V3_Malloc(sizeof(struct apic_state));
- struct vm_device * device = v3_create_device("APIC", &dev_ops, apic);
-
- return device;
+ struct vm_device * dev = v3_allocate_device(name, &dev_ops, apic);
+
+ if (v3_attach_device(vm, dev) == -1) {
+ PrintError("Could not attach device %s\n", name);
+ return -1;
+ }
+
+ v3_register_intr_controller(vm, &intr_ops, dev);
+ v3_add_timer(vm, &timer_ops, dev);
+
+ init_apic_state(apic);
+
+ v3_hook_msr(vm, BASE_ADDR_MSR, read_apic_msr, write_apic_msr, dev);
+
+ v3_hook_full_mem(vm, apic->base_addr, apic->base_addr + PAGE_SIZE_4KB, apic_read, apic_write, dev);
+
+ return 0;
}
+
+
+
+device_register("LAPIC", apic_init)