#include <palacios/vmm.h>
#include <palacios/vmm_time.h>
#include <palacios/vmm_util.h>
+#include <palacios/vmm_intr.h>
ushort_t counter;
ushort_t reload_value;
+ ushort_t latched_value;
+
+ enum {NOTLATCHED, LATCHED} latch_state;
+
+ enum {LSB, MSB} read_state;
+
uint_t output_pin : 1;
uint_t gate_input_pin : 1;
};
if (handle_crystal_tics(dev, &(state->ch_0), oscillations) == 1) {
// raise interrupt
PrintDebug("8254 PIT: Injecting Timer interrupt to guest\n");
- dev->vm->vm_ops.raise_irq(dev->vm, 0);
+ v3_raise_irq(dev->vm, 0);
}
//handle_crystal_tics(dev, &(state->ch_1), oscillations);
static int handle_channel_read(struct channel * ch, char * val) {
- return -1;
+
+ ushort_t * myval;
+
+ if (ch->latch_state == NOTLATCHED) {
+ myval = &(ch->counter);
+ } else {
+ myval = &(ch->latched_value);
+ }
+
+ if (ch->read_state == LSB) {
+ *val = ((char*)myval)[0]; // little endian
+ ch->read_state = MSB;
+ } else {
+ *val = ((char*)myval)[1];
+ ch->read_state = LSB;
+ if (ch->latch_state == LATCHED) {
+ ch->latch_state = NOTLATCHED;
+ }
+ }
+
+ return 0;
+
}
switch (cmd.access_mode) {
case LATCH_COUNT:
- return -1;
+ if (ch->latch_state == NOTLATCHED) {
+ ch->latched_value = ch->counter;
+ ch->latch_state = LATCHED;
+ }
break;
case HIBYTE_ONLY:
ch->access_state = WAITING_HIBYTE;
ch->output_pin = 0;
ch->gate_input_pin = 0;
+ ch->latched_value = 0;
+ ch->latch_state = NOTLATCHED;
+ ch->read_state = LSB;
+
return;
}