/* Gets the base address needed for a Page Table entry */
#define PD32_BASE_ADDR(x) (((uint_t)x) >> 12)
#define PT32_BASE_ADDR(x) (((uint_t)x) >> 12)
+#define PD32_4MB_BASE_ADDR(x) (((uint_t)x) >> 22)
#define PT32_PAGE_ADDR(x) (((uint_t)x) & 0xfffff000)
#define PT32_PAGE_OFFSET(x) (((uint_t)x) & 0xfff)
#define PT32_PAGE_POWER 12
+#define PD32_4MB_PAGE_ADDR(x) (((uint_t)x) & 0xffc00000)
+#define PD32_4MB_PAGE_OFFSET(x) (((uint_t)x) & 0x003fffff)
+#define PAGE_SIZE_4MB (4096 * 1024)
/* The following should be phased out */
#define PAGE_OFFSET(x) ((((uint_t)x) & 0xfff))
+
#define CR3_TO_PDE32(cr3) (((ulong_t)cr3) & 0xfffff000)
#define CR3_TO_PDPTRE(cr3) (((ulong_t)cr3) & 0xffffffe0)
#define CR3_TO_PML4E64(cr3) (((ullong_t)cr3) & 0x000ffffffffff000LL)
+
+
/* Accessor functions for the page table structures */
#define PDE32_T_ADDR(x) (((x).pt_base_addr) << 12)
#define PTE32_T_ADDR(x) (((x).page_base_addr) << 12)
-
+#define PDE32_4MB_T_ADDR(x) (((x).page_base_addr) << 22)
/* Page Table Flag Values */
#define PT32_HOOK 0x1
uint_t global_page : 1;
uint_t vmm_info : 3;
uint_t pat : 1;
- uint_t page_base_addr_lo: 8;
- uint_t zero : 1;
- uint_t page_base_addr_hi: 10;
+ uint_t rsvd : 9;
+ uint_t page_base_addr : 10;
} pde32_4MB_t;
void delete_page_tables_pde32(pde32_t * pde);
-pde32_entry_type_t pde32_lookup(pde32_t * pde, addr_t addr, addr_t * entry);
+pde32_entry_type_t pde32_lookup(pde32_t * pd, addr_t addr, addr_t * entry);
int pte32_lookup(pte32_t * pte, addr_t addr, addr_t * entry);
+// This assumes that the page table resides in the host address space
+// IE. IT DOES NO VM ADDR TRANSLATION
+int pt32_lookup(pde32_t * pd, addr_t vaddr, addr_t * paddr);
+
+
pt_access_status_t can_access_pde32(pde32_t * pde, addr_t addr, pf_error_t access_type);
pt_access_status_t can_access_pte32(pte32_t * pte, addr_t addr, pf_error_t access_type);
+
+
+
struct guest_info;
pde32_t * create_passthrough_pde32_pts(struct guest_info * guest_info);