SMSW,
CLTS,
INVLPG,
+ INT,
MOV_CR2,
MOV_2CR,
return (instr->prefixes.addr_size) ? 4 : 2;
}
default:
- PrintError("Unsupported CPU mode: %d\n", info->cpu_mode);
+ PrintError(info->vm_info, info, "Unsupported CPU mode: %d\n", info->cpu_mode);
return -1;
}
}
case XOR_MEM2_8:
case XOR_IMM2_8:
case INC_8:
+ case INT:
case DEC_8:
case NEG_8:
case NOT_8:
case MOV_MEM2:
case MOV_2MEM:
case MOV_MEM2AX:
- case MOV_AX2MEM:
- case MOV_IMM2:
+ case MOV_AX2MEM:
case MOVS:
case MOVSX:
case MOVZX:
case OR_IMM2SX_8:
case SUB_IMM2SX_8:
case XOR_IMM2SX_8:
+ case MOV_IMM2:
switch (v3_get_vm_cpu_mode(info)) {
case REAL:
return (instr->prefixes.op_size) ? 4 : 2;
if (instr->prefixes.rex_op_size) {
return 8;
} else {
- return 4;
+ return (instr->prefixes.op_size) ? 2 : 4;
}
case PROTECTED:
case PROTECTED_PAE:
return (instr->prefixes.op_size) ? 4 : 2;
}
default:
- PrintError("Unsupported CPU mode: %d\n", info->cpu_mode);
+ PrintError(info->vm_info, info, "Unsupported CPU mode: %d\n", info->cpu_mode);
return -1;
}
-
case INVLPG:
switch (v3_get_vm_cpu_mode(info)) {
case REAL:
- PrintError("Invalid instruction given operating mode (%d)\n", form);
+ PrintError(info->vm_info, info, "Invalid instruction given operating mode (%d)\n", form);
return 0;
case PROTECTED:
case PROTECTED_PAE:
case LONG:
return 8;
default:
- PrintError("Unsupported CPU mode: %d\n", info->cpu_mode);
+ PrintError(info->vm_info, info, "Unsupported CPU mode: %d\n", info->cpu_mode);
return -1;
}
case LONG:
return 8;
default:
- PrintError("Unsupported CPU mode: %d\n", info->cpu_mode);
+ PrintError(info->vm_info, info, "Unsupported CPU mode: %d\n", info->cpu_mode);
return -1;
}
+ //case INT:
case MOV_DR2:
case MOV_2DR:
case MOV_CR2:
case LONG:
return 8;
default:
- PrintError("Unsupported CPU mode: %d\n", info->cpu_mode);
+ PrintError(info->vm_info, info, "Unsupported CPU mode: %d\n", info->cpu_mode);
return -1;
}
case MOV_SR2:
case MOV_2SR:
default:
- PrintError("Unsupported instruction form %d\n", form);
+ PrintError(info->vm_info, info, "Unsupported instruction form %d\n", form);
return -1;
}
reg->operand = (addr_t)&(gprs->r15);
break;
default:
- PrintError("Invalid Reg Code (%d)\n", reg_code);
+ PrintError(core->vm_info, core, "Invalid Reg Code (%d)\n", reg_code);
reg->operand = 0;
return -1;
}
struct v3_ctrl_regs * crs = &(core->ctrl_regs);
-// PrintDebug("\t Ctrl regs %d\n", reg_code);
+// PrintDebug(core->vm_info, core, "\t Ctrl regs %d\n", reg_code);
switch (reg_code) {
case 0:
break;
default:
reg->operand = 0;
- PrintError("Invalid Reg Code (%d)\n", reg_code);
+ PrintError(core->vm_info, core, "Invalid Reg Code (%d)\n", reg_code);
return -1;
}
modrm_mode_t mod_mode = 0;
uint8_t * instr_cursor = modrm_instr;
- // PrintDebug("ModRM mod=%d\n", modrm->mod);
+ // PrintDebug(core->vm_info, core, "ModRM mod=%d\n", modrm->mod);
*reg_code = modrm->reg;
instr_cursor += 1;
if (modrm->mod == 3) {
- //PrintDebug("first operand = Register (RM=%d)\n",modrm->rm);
+ //PrintDebug(core->vm_info, core, "first operand = Register (RM=%d)\n",modrm->rm);
operand->type = REG_OPERAND;
decode_gpr(core, modrm->rm, operand);
} else if (modrm->mod == 2) {
mod_mode = DISP16;
} else {
- PrintError("Instruction format error: Invalid mod_rm mode (%d)\n", modrm->mod);
+ PrintError(core->vm_info, core, "Instruction format error: Invalid mod_rm mode (%d)\n", modrm->mod);
v3_print_instr(instr);
return -1;
}
if (modrm->mod == 3) {
operand->type = REG_OPERAND;
- // PrintDebug("first operand = Register (RM=%d)\n",modrm->rm);
+ // PrintDebug(core->vm_info, core, "first operand = Register (RM=%d)\n",modrm->rm);
decode_gpr(core, modrm->rm, operand);
} else if (modrm->mod == 2) {
mod_mode = DISP32;
} else {
- PrintError("Instruction format error: Invalid mod_rm mode (%d)\n", modrm->mod);
+ PrintError(core->vm_info, core, "Instruction format error: Invalid mod_rm mode (%d)\n", modrm->mod);
v3_print_instr(instr);
return -1;
}
}
if (has_sib_byte) {
- instr_cursor += 1;
struct sib_byte * sib = (struct sib_byte *)(instr_cursor);
int scale = 0x1 << sib->scale;
case 5:
if (modrm->mod != 0) {
base_addr += ADDR_MASK(gprs->rbp, 4);
+ } else {
+ mod_mode = DISP32;
+ base_addr = 0;
}
break;
case 6:
rm_val |= (instr->prefixes.rex_rm << 3);
operand->type = REG_OPERAND;
- // PrintDebug("first operand = Register (RM=%d)\n",modrm->rm);
+ // PrintDebug(core->vm_info, core, "first operand = Register (RM=%d)\n",modrm->rm);
decode_gpr(core, rm_val, operand);
} else {
} else if (modrm->mod == 2) {
mod_mode = DISP32;
} else {
- PrintError("Instruction format error: Invalid mod_rm mode (%d)\n", modrm->mod);
+ PrintError(core->vm_info, core, "Instruction format error: Invalid mod_rm mode (%d)\n", modrm->mod);
v3_print_instr(instr);
return -1;
}
}
if (has_sib_byte) {
- instr_cursor += 1;
struct sib_byte * sib = (struct sib_byte *)(instr_cursor);
int scale = 0x1 << sib->scale;
uint8_t index_val = sib->index;
switch (base_val) {
case 0:
- base_addr += gprs->rax
+ base_addr += gprs->rax;
break;
case 1:
- base_addr += gprs->rcx
+ base_addr += gprs->rcx;
break;
case 2:
- base_addr += gprs->rdx
+ base_addr += gprs->rdx;
break;
case 3:
- base_addr += gprs->rbx
+ base_addr += gprs->rbx;
break;
case 4:
- base_addr += gprs->rsp
+ base_addr += gprs->rsp;
break;
case 5:
if (modrm->mod != 0) {
- base_addr += gprs->rbp
+ base_addr += gprs->rbp;
+ } else {
+ mod_mode = DISP32;
+ base_addr = 0;
}
break;
case 6:
- base_addr += gprs->rsi
+ base_addr += gprs->rsi;
break;
case 7:
- base_addr += gprs->rdi
+ base_addr += gprs->rdi;
break;
case 8:
- base_addr += gprs->r8
+ base_addr += gprs->r8;
break;
case 9:
- base_addr += gprs->r9
+ base_addr += gprs->r9;
break;
case 10:
- base_addr += gprs->r10
+ base_addr += gprs->r10;
break;
case 11:
- base_addr += gprs->r11
+ base_addr += gprs->r11;
break;
case 12:
- base_addr += gprs->r12
+ base_addr += gprs->r12;
break;
case 13:
- base_addr += gprs->r13
+ base_addr += gprs->r13;
break;
case 14:
- base_addr += gprs->r14
+ base_addr += gprs->r14;
break;
case 15:
base_addr += gprs->r15;
}
- /*
- Segments should be ignored
- // get appropriate segment
- if (instr->prefixes.cs_override) {
- seg = &(core->segments.cs);
- } else if (instr->prefixes.es_override) {
- seg = &(core->segments.es);
- } else if (instr->prefixes.ss_override) {
- seg = &(core->segments.ss);
- } else if (instr->prefixes.fs_override) {
- seg = &(core->segments.fs);
- } else if (instr->prefixes.gs_override) {
- seg = &(core->segments.gs);
- } else {
- seg = &(core->segments.ds);
- }
- */
+
+ //Segments should be ignored
+ // get appropriate segment
+
+ if (instr->prefixes.cs_override) {
+ seg = &(core->segments.cs);
+ } else if (instr->prefixes.es_override) {
+ seg = &(core->segments.es);
+ } else if (instr->prefixes.ss_override) {
+ seg = &(core->segments.ss);
+ } else if (instr->prefixes.fs_override) {
+ seg = &(core->segments.fs);
+ } else if (instr->prefixes.gs_override) {
+ seg = &(core->segments.gs);
+ } else {
+ seg = &(core->segments.ds);
+ }
+
operand->operand = ADDR_MASK(get_addr_linear(core, base_addr, seg),
get_addr_width(core, instr));
case REAL:
return decode_rm_operand16(core, instr_ptr, instr, operand, reg_code);
case LONG:
- if (instr->prefixes.rex_op_size) {
+ if (instr->prefixes.rex) {
return decode_rm_operand64(core, instr_ptr, instr, operand, reg_code);
}
case PROTECTED:
case LONG_32_COMPAT:
return decode_rm_operand32(core, instr_ptr, instr, operand, reg_code);
default:
- PrintError("Invalid CPU_MODE (%d)\n", mode);
+ PrintError(core->vm_info, core, "Invalid CPU_MODE (%d)\n", mode);
return -1;
}
}
case 0xf4:
return HLT;
+ case 0xcd:
+ return INT;
case 0xf6: {
struct modrm_byte * modrm = (struct modrm_byte *)&(instr[1]);
case SETO: return "SETO";
case STOS_8: return "STOS_8";
case STOS: return "STOS";
+ case INT: return "INT";
case INVALID_INSTR:
default: