2 * This file is part of the Palacios Virtual Machine Monitor developed
3 * by the V3VEE Project with funding from the United States National
4 * Science Foundation and the Department of Energy.
6 * The V3VEE Project is a joint project between Northwestern University
7 * and the University of New Mexico. You can find out more at
10 * Copyright (c) 2008, Jack Lange <jarusl@cs.northwestern.edu>
11 * Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org>
12 * All rights reserved.
14 * Author: Jack Lange <jarusl@cs.northwestern.edu>
16 * This is free software. You are permitted to use,
17 * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
20 #ifdef __DECODER_TEST__
21 #include "vmm_decoder.h"
23 #include <xed/xed-interface.h>
29 #include <palacios/vmm_decoder.h>
30 #include <palacios/vmm_xed.h>
31 #include <xed/xed-interface.h>
32 #include <palacios/vm_guest.h>
33 #include <palacios/vmm.h>
38 #ifndef CONFIG_DEBUG_XED
40 #define PrintDebug(fmt, args...)
46 static uint_t tables_inited = 0;
49 #define GPR_REGISTER 0
50 #define SEGMENT_REGISTER 1
51 #define CTRL_REGISTER 2
52 #define DEBUG_REGISTER 3
56 /* Disgusting mask hack...
57 I can't think right now, so we'll do it this way...
59 static const ullong_t mask_1 = 0x00000000000000ffLL;
60 static const ullong_t mask_2 = 0x000000000000ffffLL;
61 static const ullong_t mask_4 = 0x00000000ffffffffLL;
62 static const ullong_t mask_8 = 0xffffffffffffffffLL;
65 #define MASK(val, length) ({ \
66 ullong_t mask = 0x0LL; \
84 struct memory_operand {
92 uint_t displacement_size;
93 ullong_t displacement;
99 static v3_op_type_t get_opcode(xed_iform_enum_t iform);
101 static int xed_reg_to_v3_reg(struct guest_info * info, xed_reg_enum_t xed_reg, addr_t * v3_reg, uint_t * reg_len);
102 static int get_memory_operand(struct guest_info * info, xed_decoded_inst_t * xed_instr, uint_t index, struct x86_operand * operand);
104 static int set_decoder_mode(struct guest_info * info, xed_state_t * state) {
105 switch (v3_get_vm_cpu_mode(info)) {
107 if (state->mmode != XED_MACHINE_MODE_LEGACY_16) {
108 xed_state_init(state,
109 XED_MACHINE_MODE_LEGACY_16,
110 XED_ADDRESS_WIDTH_16b,
111 XED_ADDRESS_WIDTH_16b);
116 if (state->mmode != XED_MACHINE_MODE_LEGACY_32) {
117 xed_state_init(state,
118 XED_MACHINE_MODE_LEGACY_32,
119 XED_ADDRESS_WIDTH_32b,
120 XED_ADDRESS_WIDTH_32b);
124 if (state->mmode != XED_MACHINE_MODE_LONG_COMPAT_32) {
125 xed_state_init(state,
126 XED_MACHINE_MODE_LONG_COMPAT_32,
127 XED_ADDRESS_WIDTH_32b,
128 XED_ADDRESS_WIDTH_32b);
132 if (state->mmode != XED_MACHINE_MODE_LONG_64) {
133 PrintDebug("Setting decoder to long mode\n");
134 // state->mmode = XED_MACHINE_MODE_LONG_64;
135 //xed_state_set_machine_mode(state, XED_MACHINE_MODE_LONG_64);
136 xed_state_init(state,
137 XED_MACHINE_MODE_LONG_64,
138 XED_ADDRESS_WIDTH_64b,
139 XED_ADDRESS_WIDTH_64b);
143 PrintError("Unsupported CPU mode: %d\n", info->cpu_mode);
150 static int is_flags_reg(xed_reg_enum_t xed_reg) {
162 int v3_init_decoder(struct guest_info * info) {
163 // Global library initialization, only do it once
164 if (tables_inited == 0) {
169 xed_state_t * decoder_state = (xed_state_t *)V3_Malloc(sizeof(xed_state_t));
170 xed_state_zero(decoder_state);
171 xed_state_init(decoder_state,
172 XED_MACHINE_MODE_LEGACY_32,
173 XED_ADDRESS_WIDTH_32b,
174 XED_ADDRESS_WIDTH_32b);
176 info->decoder_state = decoder_state;
183 int v3_deinit_decoder(struct guest_info * core) {
184 V3_Free(core->decoder_state);
192 static int decode_string_op(struct guest_info * info,
193 xed_decoded_inst_t * xed_instr, const xed_inst_t * xi,
194 struct x86_instr * instr) {
196 PrintDebug("String operation\n");
198 if (instr->op_type == V3_OP_MOVS) {
199 instr->num_operands = 2;
201 if (get_memory_operand(info, xed_instr, 0, &(instr->dst_operand)) == -1) {
202 PrintError("Could not get Destination memory operand\n");
206 if (get_memory_operand(info, xed_instr, 1, &(instr->src_operand)) == -1) {
207 PrintError("Could not get Source memory operand\n");
211 if (instr->prefixes.rep == 1) {
213 uint_t reg_length = 0;
215 xed_reg_to_v3_reg(info, xed_decoded_inst_get_reg(xed_instr, XED_OPERAND_REG0), ®_addr, ®_length);
216 instr->str_op_length = MASK(*(addr_t *)reg_addr, reg_length);
218 instr->str_op_length = 1;
221 } else if (instr->op_type == V3_OP_STOS) {
222 instr->num_operands = 2;
224 if (get_memory_operand(info, xed_instr, 0, &(instr->dst_operand)) == -1) {
225 PrintError("Could not get Destination memory operand\n");
229 // STOS reads from rax
230 xed_reg_to_v3_reg(info, xed_decoded_inst_get_reg(xed_instr, XED_OPERAND_REG0),
231 &(instr->src_operand.operand),
232 &(instr->src_operand.size));
233 instr->src_operand.type = REG_OPERAND;
235 if (instr->prefixes.rep == 1) {
237 uint_t reg_length = 0;
239 xed_reg_to_v3_reg(info, xed_decoded_inst_get_reg(xed_instr, XED_OPERAND_REG1),
240 ®_addr, ®_length);
241 instr->str_op_length = MASK(*(addr_t *)reg_addr, reg_length);
243 instr->str_op_length = 1;
247 PrintError("Unhandled String OP\n");
256 int v3_disasm(struct guest_info * info, void *instr_ptr, addr_t * rip, int mark) {
260 xed_decoded_inst_t xed_instr;
261 xed_error_enum_t xed_error;
263 /* disassemble the specified instruction */
264 if (set_decoder_mode(info, info->decoder_state) == -1) {
265 PrintError("Could not set decoder mode\n");
269 xed_decoded_inst_zero_set_mode(&xed_instr, info->decoder_state);
271 xed_error = xed_decode(&xed_instr,
272 REINTERPRET_CAST(const xed_uint8_t *, instr_ptr),
273 XED_MAX_INSTRUCTION_BYTES);
275 if (xed_error != XED_ERROR_NONE) {
276 PrintError("Xed error: %s\n", xed_error_enum_t2str(xed_error));
280 /* obtain string representation in AT&T syntax */
281 if (!xed_format_att(&xed_instr, buffer, sizeof(buffer), *rip)) {
282 PrintError("Xed error: cannot disaaemble\n");
286 /* print address, opcode bytes and the disassembled instruction */
287 length = xed_decoded_inst_get_length(&xed_instr);
288 V3_Print("0x%p %c ", (void *) *rip, mark ? '*' : ' ');
289 for (i = 0; i < length; i++) {
290 unsigned char b = ((unsigned char *) instr_ptr)[i];
291 V3_Print("%x%x ", b >> 4, b & 0xf);
296 V3_Print("%s\n", buffer);
298 /* move on to next instruction */
305 int v3_decode(struct guest_info * info, addr_t instr_ptr, struct x86_instr * instr) {
306 xed_decoded_inst_t xed_instr;
307 xed_error_enum_t xed_error;
310 v3_get_prefixes((uchar_t *)instr_ptr, &(instr->prefixes));
312 if (set_decoder_mode(info, info->decoder_state) == -1) {
313 PrintError("Could not set decoder mode\n");
317 xed_decoded_inst_zero_set_mode(&xed_instr, info->decoder_state);
319 xed_error = xed_decode(&xed_instr,
320 REINTERPRET_CAST(const xed_uint8_t *, instr_ptr),
321 XED_MAX_INSTRUCTION_BYTES);
324 if (xed_error != XED_ERROR_NONE) {
325 PrintError("Xed error: %s\n", xed_error_enum_t2str(xed_error));
329 const xed_inst_t * xi = xed_decoded_inst_inst(&xed_instr);
331 instr->instr_length = xed_decoded_inst_get_length(&xed_instr);
334 xed_iform_enum_t iform = xed_decoded_inst_get_iform_enum(&xed_instr);
336 #ifdef CONFIG_DEBUG_XED
337 xed_iclass_enum_t iclass = xed_decoded_inst_get_iclass(&xed_instr);
339 PrintDebug("iform=%s, iclass=%s\n", xed_iform_enum_t2str(iform), xed_iclass_enum_t2str(iclass));
343 if ((instr->op_type = get_opcode(iform)) == V3_INVALID_OP) {
344 PrintError("Could not get opcode. (iform=%s)\n", xed_iform_enum_t2str(iform));
349 // We special case the string operations...
350 if (xed_decoded_inst_get_category(&xed_instr) == XED_CATEGORY_STRINGOP) {
351 instr->is_str_op = 1;
352 return decode_string_op(info, &xed_instr, xi, instr);
354 instr->is_str_op = 0;
355 instr->str_op_length = 0;
358 instr->num_operands = xed_decoded_inst_noperands(&xed_instr);
361 if (instr->num_operands > 3) {
362 PrintDebug("Special Case Not Handled (more than 3 operands) (iform=%s)\n", xed_iform_enum_t2str(iform)
365 } else if (instr->num_operands == 3) {
366 const xed_operand_t * op = xed_inst_operand(xi, 2);
367 xed_operand_enum_t op_enum = xed_operand_name(op);
369 if ((!xed_operand_is_register(op_enum)) ||
370 (!is_flags_reg(xed_decoded_inst_get_reg(&xed_instr, op_enum)))) {
372 PrintError("Special Case not handled (iform=%s)\n", xed_iform_enum_t2str(iform));
378 //PrintDebug("Number of operands: %d\n", instr->num_operands);
379 //PrintDebug("INSTR length: %d\n", instr->instr_length);
382 if (instr->num_operands >= 1) {
383 const xed_operand_t * op = xed_inst_operand(xi, 0);
384 xed_operand_enum_t op_enum = xed_operand_name(op);
386 struct x86_operand * v3_op = NULL;
389 if (xed_operand_written(op)) {
390 v3_op = &(instr->dst_operand);
392 v3_op = &(instr->src_operand);
396 v3_op = &(instr->dst_operand);
398 if (xed_operand_is_register(op_enum)) {
399 xed_reg_enum_t xed_reg = xed_decoded_inst_get_reg(&xed_instr, op_enum);
400 int v3_reg_type = xed_reg_to_v3_reg(info,
405 if (v3_reg_type == -1) {
406 PrintError("First operand is an Unhandled Operand: %s\n", xed_reg_enum_t2str(xed_reg));
407 v3_op->type = INVALID_OPERAND;
409 } else if (v3_reg_type == SEGMENT_REGISTER) {
410 struct v3_segment * seg_reg = (struct v3_segment *)(v3_op->operand);
411 v3_op->operand = (addr_t)&(seg_reg->selector);
414 v3_op->type = REG_OPERAND;
419 case XED_OPERAND_MEM0:
421 PrintDebug("Memory operand (1)\n");
422 if (get_memory_operand(info, &xed_instr, 0, v3_op) == -1) {
423 PrintError("Could not get first memory operand\n");
429 case XED_OPERAND_MEM1:
430 case XED_OPERAND_IMM1:
432 PrintError("Illegal Operand Order\n");
436 case XED_OPERAND_IMM0:
437 case XED_OPERAND_AGEN:
438 case XED_OPERAND_PTR:
439 case XED_OPERAND_RELBR:
441 PrintError("Unhandled Operand Type\n");
447 // set second operand
448 if (instr->num_operands >= 2) {
449 const xed_operand_t * op = xed_inst_operand(xi, 1);
450 // xed_operand_type_enum_t op_type = xed_operand_type(op);
451 xed_operand_enum_t op_enum = xed_operand_name(op);
453 struct x86_operand * v3_op;
456 if (xed_operand_written(op)) {
457 v3_op = &(instr->dst_operand);
459 v3_op = &(instr->src_operand);
462 v3_op = &(instr->src_operand);
464 if (xed_operand_is_register(op_enum)) {
465 xed_reg_enum_t xed_reg = xed_decoded_inst_get_reg(&xed_instr, op_enum);
466 int v3_reg_type = xed_reg_to_v3_reg(info,
470 if (v3_reg_type == -1) {
471 PrintError("Second operand is an Unhandled Operand: %s\n", xed_reg_enum_t2str(xed_reg));
472 v3_op->type = INVALID_OPERAND;
474 } else if (v3_reg_type == SEGMENT_REGISTER) {
475 struct v3_segment * seg_reg = (struct v3_segment *)(v3_op->operand);
476 v3_op->operand = (addr_t)&(seg_reg->selector);
479 v3_op->type = REG_OPERAND;
483 case XED_OPERAND_MEM0:
485 PrintDebug("Memory operand (2)\n");
486 if (get_memory_operand(info, &xed_instr, 0, v3_op) == -1) {
487 PrintError("Could not get first memory operand\n");
493 case XED_OPERAND_IMM0:
495 instr->src_operand.size = xed_decoded_inst_get_immediate_width(&xed_instr);
497 if (instr->src_operand.size > 4) {
498 PrintError("Unhandled 64 bit immediates\n");
501 instr->src_operand.operand = xed_decoded_inst_get_unsigned_immediate(&xed_instr);
503 instr->src_operand.type = IMM_OPERAND;
508 case XED_OPERAND_MEM1:
509 case XED_OPERAND_IMM1:
511 PrintError("Illegal Operand Order\n");
514 case XED_OPERAND_AGEN:
515 case XED_OPERAND_PTR:
516 case XED_OPERAND_RELBR:
518 PrintError("Unhandled Operand Type\n");
525 if (instr->num_operands >= 3) {
526 const xed_operand_t * op = xed_inst_operand(xi, 2);
527 xed_operand_type_enum_t op_type = xed_operand_type(op);
528 xed_operand_enum_t op_enum = xed_operand_name(op);
530 if (xed_operand_is_register(op_enum)) {
531 xed_reg_enum_t xed_reg = xed_decoded_inst_get_reg(&xed_instr, op_enum);
532 int v3_reg_type = xed_reg_to_v3_reg(info,
534 &(instr->third_operand.operand),
535 &(instr->third_operand.size));
537 if (v3_reg_type == -1) {
538 PrintError("Third operand is an Unhandled Operand: %s\n", xed_reg_enum_t2str(xed_reg));
539 instr->third_operand.type = INVALID_OPERAND;
541 } else if (v3_reg_type == SEGMENT_REGISTER) {
542 struct v3_segment * seg_reg = (struct v3_segment *)(instr->third_operand.operand);
543 instr->third_operand.operand = (addr_t)&(seg_reg->selector);
547 instr->third_operand.type = REG_OPERAND;
550 PrintError("Unhandled third operand type %s\n", xed_operand_type_enum_t2str(op_type));
551 instr->num_operands = 2;
559 int v3_encode(struct guest_info * info, struct x86_instr * instr, uint8_t * instr_buf) {
568 static int get_memory_operand(struct guest_info * info, xed_decoded_inst_t * xed_instr, uint_t op_index, struct x86_operand * operand) {
569 struct memory_operand mem_op;
575 ullong_t displacement;
576 int addr_width = v3_get_addr_width(info);
577 v3_cpu_mode_t cpu_mode = v3_get_vm_cpu_mode(info);
578 // struct v3_segment * seg_reg;
580 PrintDebug("Xed mode = %s\n", xed_machine_mode_enum_t2str(xed_state_get_machine_mode(info->decoder_state)));
581 PrintDebug("Address width: %s\n",
582 xed_address_width_enum_t2str(xed_state_get_address_width(info->decoder_state)));
583 PrintDebug("Stack Address width: %s\n",
584 xed_address_width_enum_t2str(xed_state_get_stack_address_width(info->decoder_state)));
588 memset((void*)&mem_op, '\0', sizeof(struct memory_operand));
590 xed_reg_enum_t xed_seg = xed_decoded_inst_get_seg_reg(xed_instr, op_index);
591 if (xed_seg != XED_REG_INVALID) {
592 struct v3_segment *tmp_segment;
593 if (xed_reg_to_v3_reg(info, xed_seg, (addr_t *)&tmp_segment, &(mem_op.segment_size)) == -1) {
594 PrintError("Unhandled Segment Register\n");
597 mem_op.segment = tmp_segment->base;
600 xed_reg_enum_t xed_base = xed_decoded_inst_get_base_reg(xed_instr, op_index);
601 if (xed_base != XED_REG_INVALID) {
603 if (xed_reg_to_v3_reg(info, xed_base, &base_reg, &(mem_op.base_size)) == -1) {
604 PrintError("Unhandled Base register\n");
607 mem_op.base = *(addr_t *)base_reg;
612 xed_reg_enum_t xed_idx = xed_decoded_inst_get_index_reg(xed_instr, op_index);
613 if ((op_index == 0) && (xed_idx != XED_REG_INVALID)) {
616 if (xed_reg_to_v3_reg(info, xed_idx, &index_reg, &(mem_op.index_size)) == -1) {
617 PrintError("Unhandled Index Register\n");
621 mem_op.index= *(addr_t *)index_reg;
623 xed_uint_t xed_scale = xed_decoded_inst_get_scale(xed_instr, op_index);
624 if (xed_scale != 0) {
625 mem_op.scale = xed_scale;
630 xed_uint_t disp_bits = xed_decoded_inst_get_memory_displacement_width(xed_instr, op_index);
632 xed_int64_t xed_disp = xed_decoded_inst_get_memory_displacement(xed_instr, op_index);
634 mem_op.displacement_size = disp_bits;
635 mem_op.displacement = xed_disp;
638 operand->type = MEM_OPERAND;
639 operand->size = xed_decoded_inst_get_memory_operand_length(xed_instr, op_index);
643 PrintDebug("Struct: Seg=%p (size=%d), base=%p, index=%p, scale=%p, displacement=%p (size=%d)\n",
644 (void *)mem_op.segment, mem_op.segment_size, (void*)mem_op.base, (void *)mem_op.index,
645 (void *)mem_op.scale, (void *)(addr_t)mem_op.displacement, mem_op.displacement_size);
648 PrintDebug("operand size: %d\n", operand->size);
650 seg = MASK(mem_op.segment, mem_op.segment_size);
651 base = MASK(mem_op.base, mem_op.base_size);
652 index = MASK(mem_op.index, mem_op.index_size);
653 scale = mem_op.scale;
655 // XED returns the displacement as a 2s complement signed number, but it can
656 // have different sizes, depending on the instruction encoding.
657 // we put that into a 64 bit unsigned (the unsigned doesn't matter since
658 // we only ever do 2s complement arithmetic on it. However, this means we
659 // need to sign-extend what XED provides through 64 bits.
660 displacement = mem_op.displacement;
661 displacement <<= 64 - mem_op.displacement_size * 8;
662 displacement = ((sllong_t)displacement) >> (64 - mem_op.displacement_size * 8);
665 PrintDebug("Seg=%p, base=%p, index=%p, scale=%p, displacement=%p\n",
666 (void *)seg, (void *)base, (void *)index, (void *)scale, (void *)(addr_t)displacement);
668 if (cpu_mode == REAL) {
669 operand->operand = seg + MASK((base + (scale * index) + displacement), addr_width);
671 operand->operand = MASK((seg + base + (scale * index) + displacement), addr_width);
678 static int xed_reg_to_v3_reg(struct guest_info * info, xed_reg_enum_t xed_reg,
679 addr_t * v3_reg, uint_t * reg_len) {
681 PrintDebug("Xed Register: %s\n", xed_reg_enum_t2str(xed_reg));
684 case XED_REG_INVALID:
693 *v3_reg = (addr_t)&(info->vm_regs.rax);
697 *v3_reg = (addr_t)&(info->vm_regs.rax);
701 *v3_reg = (addr_t)&(info->vm_regs.rax);
705 *v3_reg = (addr_t)(&(info->vm_regs.rax)) + 1;
709 *v3_reg = (addr_t)&(info->vm_regs.rax);
714 *v3_reg = (addr_t)&(info->vm_regs.rcx);
718 *v3_reg = (addr_t)&(info->vm_regs.rcx);
722 *v3_reg = (addr_t)&(info->vm_regs.rcx);
726 *v3_reg = (addr_t)(&(info->vm_regs.rcx)) + 1;
730 *v3_reg = (addr_t)&(info->vm_regs.rcx);
735 *v3_reg = (addr_t)&(info->vm_regs.rdx);
739 *v3_reg = (addr_t)&(info->vm_regs.rdx);
743 *v3_reg = (addr_t)&(info->vm_regs.rdx);
747 *v3_reg = (addr_t)(&(info->vm_regs.rdx)) + 1;
751 *v3_reg = (addr_t)&(info->vm_regs.rdx);
756 *v3_reg = (addr_t)&(info->vm_regs.rbx);
760 *v3_reg = (addr_t)&(info->vm_regs.rbx);
764 *v3_reg = (addr_t)&(info->vm_regs.rbx);
768 *v3_reg = (addr_t)(&(info->vm_regs.rbx)) + 1;
772 *v3_reg = (addr_t)&(info->vm_regs.rbx);
778 *v3_reg = (addr_t)&(info->vm_regs.rsp);
782 *v3_reg = (addr_t)&(info->vm_regs.rsp);
786 *v3_reg = (addr_t)&(info->vm_regs.rsp);
790 *v3_reg = (addr_t)&(info->vm_regs.rsp);
795 *v3_reg = (addr_t)&(info->vm_regs.rbp);
799 *v3_reg = (addr_t)&(info->vm_regs.rbp);
803 *v3_reg = (addr_t)&(info->vm_regs.rbp);
807 *v3_reg = (addr_t)&(info->vm_regs.rbp);
814 *v3_reg = (addr_t)&(info->vm_regs.rsi);
818 *v3_reg = (addr_t)&(info->vm_regs.rsi);
822 *v3_reg = (addr_t)&(info->vm_regs.rsi);
826 *v3_reg = (addr_t)&(info->vm_regs.rsi);
832 *v3_reg = (addr_t)&(info->vm_regs.rdi);
836 *v3_reg = (addr_t)&(info->vm_regs.rdi);
840 *v3_reg = (addr_t)&(info->vm_regs.rdi);
844 *v3_reg = (addr_t)&(info->vm_regs.rdi);
853 *v3_reg = (addr_t)&(info->vm_regs.r8);
857 *v3_reg = (addr_t)&(info->vm_regs.r8);
861 *v3_reg = (addr_t)&(info->vm_regs.r8);
865 *v3_reg = (addr_t)&(info->vm_regs.r8);
870 *v3_reg = (addr_t)&(info->vm_regs.r9);
874 *v3_reg = (addr_t)&(info->vm_regs.r9);
878 *v3_reg = (addr_t)&(info->vm_regs.r9);
882 *v3_reg = (addr_t)&(info->vm_regs.r9);
887 *v3_reg = (addr_t)&(info->vm_regs.r10);
891 *v3_reg = (addr_t)&(info->vm_regs.r10);
895 *v3_reg = (addr_t)&(info->vm_regs.r10);
899 *v3_reg = (addr_t)&(info->vm_regs.r10);
904 *v3_reg = (addr_t)&(info->vm_regs.r11);
908 *v3_reg = (addr_t)&(info->vm_regs.r11);
912 *v3_reg = (addr_t)&(info->vm_regs.r11);
916 *v3_reg = (addr_t)&(info->vm_regs.r11);
921 *v3_reg = (addr_t)&(info->vm_regs.r12);
925 *v3_reg = (addr_t)&(info->vm_regs.r12);
929 *v3_reg = (addr_t)&(info->vm_regs.r12);
933 *v3_reg = (addr_t)&(info->vm_regs.r12);
938 *v3_reg = (addr_t)&(info->vm_regs.r13);
942 *v3_reg = (addr_t)&(info->vm_regs.r13);
946 *v3_reg = (addr_t)&(info->vm_regs.r13);
950 *v3_reg = (addr_t)&(info->vm_regs.r13);
955 *v3_reg = (addr_t)&(info->vm_regs.r14);
959 *v3_reg = (addr_t)&(info->vm_regs.r14);
963 *v3_reg = (addr_t)&(info->vm_regs.r14);
967 *v3_reg = (addr_t)&(info->vm_regs.r14);
972 *v3_reg = (addr_t)&(info->vm_regs.r15);
976 *v3_reg = (addr_t)&(info->vm_regs.r15);
980 *v3_reg = (addr_t)&(info->vm_regs.r15);
984 *v3_reg = (addr_t)&(info->vm_regs.r15);
993 *v3_reg = (addr_t)&(info->rip);
995 return CTRL_REGISTER;
997 *v3_reg = (addr_t)&(info->rip);
999 return CTRL_REGISTER;
1001 *v3_reg = (addr_t)&(info->rip);
1003 return CTRL_REGISTER;
1006 *v3_reg = (addr_t)&(info->ctrl_regs.rflags);
1008 return CTRL_REGISTER;
1009 case XED_REG_EFLAGS:
1010 *v3_reg = (addr_t)&(info->ctrl_regs.rflags);
1012 return CTRL_REGISTER;
1013 case XED_REG_RFLAGS:
1014 *v3_reg = (addr_t)&(info->ctrl_regs.rflags);
1016 return CTRL_REGISTER;
1019 *v3_reg = (addr_t)&(info->ctrl_regs.cr0);
1021 return CTRL_REGISTER;
1023 *v3_reg = (addr_t)&(info->ctrl_regs.cr2);
1025 return CTRL_REGISTER;
1027 *v3_reg = (addr_t)&(info->ctrl_regs.cr3);
1029 return CTRL_REGISTER;
1031 *v3_reg = (addr_t)&(info->ctrl_regs.cr4);
1033 return CTRL_REGISTER;
1035 *v3_reg = (addr_t)&(info->ctrl_regs.cr8);
1037 return CTRL_REGISTER;
1059 *v3_reg = (addr_t)&(info->segments.cs);
1061 return SEGMENT_REGISTER;
1063 *v3_reg = (addr_t)&(info->segments.ds);
1065 return SEGMENT_REGISTER;
1067 *v3_reg = (addr_t)&(info->segments.es);
1069 return SEGMENT_REGISTER;
1071 *v3_reg = (addr_t)&(info->segments.ss);
1073 return SEGMENT_REGISTER;
1075 *v3_reg = (addr_t)&(info->segments.fs);
1077 return SEGMENT_REGISTER;
1079 *v3_reg = (addr_t)&(info->segments.gs);
1081 return SEGMENT_REGISTER;
1088 PrintError("Segment selector operand... Don't know how to handle this...\n");
1153 case XED_REG_STACKPUSH:
1154 case XED_REG_STACKPOP:
1157 case XED_REG_TSCAUX:
1160 case XED_REG_X87CONTROL:
1161 case XED_REG_X87STATUS:
1162 case XED_REG_X87TOP:
1163 case XED_REG_X87TAG:
1164 case XED_REG_X87PUSH:
1165 case XED_REG_X87POP:
1166 case XED_REG_X87POP2:
1201 static v3_op_type_t get_opcode(xed_iform_enum_t iform) {
1205 /* Control Instructions */
1207 case XED_IFORM_MOV_CR_GPR64_CR:
1208 case XED_IFORM_MOV_CR_GPR32_CR:
1209 return V3_OP_MOVCR2;
1211 case XED_IFORM_MOV_CR_CR_GPR64:
1212 case XED_IFORM_MOV_CR_CR_GPR32:
1213 return V3_OP_MOV2CR;
1215 case XED_IFORM_SMSW_GPRv:
1218 case XED_IFORM_LMSW_GPR16:
1221 case XED_IFORM_CLTS:
1224 case XED_IFORM_INVLPG_MEMb:
1225 return V3_OP_INVLPG;
1228 /* Data Instructions */
1231 case XED_IFORM_ADC_MEMv_GPRv:
1232 case XED_IFORM_ADC_MEMv_IMM:
1233 case XED_IFORM_ADC_MEMb_GPR8:
1234 case XED_IFORM_ADC_MEMb_IMM:
1236 case XED_IFORM_ADC_GPRv_MEMv:
1237 case XED_IFORM_ADC_GPR8_MEMb:
1241 case XED_IFORM_ADD_MEMv_GPRv:
1242 case XED_IFORM_ADD_MEMb_IMM:
1243 case XED_IFORM_ADD_MEMb_GPR8:
1244 case XED_IFORM_ADD_MEMv_IMM:
1246 case XED_IFORM_ADD_GPRv_MEMv:
1247 case XED_IFORM_ADD_GPR8_MEMb:
1251 case XED_IFORM_AND_MEMv_IMM:
1252 case XED_IFORM_AND_MEMb_GPR8:
1253 case XED_IFORM_AND_MEMv_GPRv:
1254 case XED_IFORM_AND_MEMb_IMM:
1256 case XED_IFORM_AND_GPR8_MEMb:
1257 case XED_IFORM_AND_GPRv_MEMv:
1261 case XED_IFORM_SUB_MEMv_IMM:
1262 case XED_IFORM_SUB_MEMb_GPR8:
1263 case XED_IFORM_SUB_MEMb_IMM:
1264 case XED_IFORM_SUB_MEMv_GPRv:
1266 case XED_IFORM_SUB_GPR8_MEMb:
1267 case XED_IFORM_SUB_GPRv_MEMv:
1271 case XED_IFORM_MOV_MEMv_GPRv:
1272 case XED_IFORM_MOV_MEMb_GPR8:
1273 case XED_IFORM_MOV_MEMv_OrAX:
1274 case XED_IFORM_MOV_MEMb_AL:
1275 case XED_IFORM_MOV_MEMv_IMM:
1276 case XED_IFORM_MOV_MEMb_IMM:
1278 case XED_IFORM_MOV_GPRv_MEMv:
1279 case XED_IFORM_MOV_GPR8_MEMb:
1280 case XED_IFORM_MOV_OrAX_MEMv:
1281 case XED_IFORM_MOV_AL_MEMb:
1286 case XED_IFORM_MOVZX_GPRv_MEMb:
1287 case XED_IFORM_MOVZX_GPRv_MEMw:
1291 case XED_IFORM_MOVSX_GPRv_MEMb:
1292 case XED_IFORM_MOVSX_GPRv_MEMw:
1297 case XED_IFORM_DEC_MEMv:
1298 case XED_IFORM_DEC_MEMb:
1301 case XED_IFORM_INC_MEMb:
1302 case XED_IFORM_INC_MEMv:
1306 case XED_IFORM_OR_MEMv_IMM:
1307 case XED_IFORM_OR_MEMb_IMM:
1308 case XED_IFORM_OR_MEMv_GPRv:
1309 case XED_IFORM_OR_MEMb_GPR8:
1311 case XED_IFORM_OR_GPRv_MEMv:
1312 case XED_IFORM_OR_GPR8_MEMb:
1316 case XED_IFORM_XOR_MEMv_GPRv:
1317 case XED_IFORM_XOR_MEMb_IMM:
1318 case XED_IFORM_XOR_MEMb_GPR8:
1319 case XED_IFORM_XOR_MEMv_IMM:
1321 case XED_IFORM_XOR_GPRv_MEMv:
1322 case XED_IFORM_XOR_GPR8_MEMb:
1325 case XED_IFORM_NEG_MEMb:
1326 case XED_IFORM_NEG_MEMv:
1329 case XED_IFORM_NOT_MEMv:
1330 case XED_IFORM_NOT_MEMb:
1333 case XED_IFORM_XCHG_MEMv_GPRv:
1334 case XED_IFORM_XCHG_MEMb_GPR8:
1337 case XED_IFORM_SETB_MEMb:
1340 case XED_IFORM_SETBE_MEMb:
1343 case XED_IFORM_SETL_MEMb:
1346 case XED_IFORM_SETLE_MEMb:
1349 case XED_IFORM_SETNB_MEMb:
1352 case XED_IFORM_SETNBE_MEMb:
1353 return V3_OP_SETNBE;
1355 case XED_IFORM_SETNL_MEMb:
1358 case XED_IFORM_SETNLE_MEMb:
1359 return V3_OP_SETNLE;
1361 case XED_IFORM_SETNO_MEMb:
1364 case XED_IFORM_SETNP_MEMb:
1367 case XED_IFORM_SETNS_MEMb:
1370 case XED_IFORM_SETNZ_MEMb:
1373 case XED_IFORM_SETO_MEMb:
1376 case XED_IFORM_SETP_MEMb:
1379 case XED_IFORM_SETS_MEMb:
1382 case XED_IFORM_SETZ_MEMb:
1385 case XED_IFORM_MOVSB:
1386 case XED_IFORM_MOVSW:
1387 case XED_IFORM_MOVSD:
1388 case XED_IFORM_MOVSQ:
1391 case XED_IFORM_STOSB:
1392 case XED_IFORM_STOSW:
1393 case XED_IFORM_STOSD:
1394 case XED_IFORM_STOSQ:
1399 return V3_INVALID_OP;