2 * This file is part of the Palacios Virtual Machine Monitor developed
3 * by the V3VEE Project with funding from the United States National
4 * Science Foundation and the Department of Energy.
6 * The V3VEE Project is a joint project between Northwestern University
7 * and the University of New Mexico. You can find out more at
10 * Copyright (c) 2008, Jack Lange <jarusl@cs.northwestern.edu>
11 * Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org>
12 * All rights reserved.
14 * Author: Jack Lange <jarusl@cs.northwestern.edu>
16 * This is free software. You are permitted to use,
17 * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
20 #ifdef __DECODER_TEST__
21 #include "vmm_decoder.h"
23 #include <xed/xed-interface.h>
29 #include <palacios/vmm_decoder.h>
30 #include <palacios/vmm_xed.h>
31 #include <xed/xed-interface.h>
32 #include <palacios/vm_guest.h>
33 #include <palacios/vmm.h>
40 #define PrintDebug(fmt, args...)
46 static uint_t tables_inited = 0;
49 #define GPR_REGISTER 0
50 #define SEGMENT_REGISTER 1
51 #define CTRL_REGISTER 2
52 #define DEBUG_REGISTER 3
56 /* Disgusting mask hack...
57 I can't think right now, so we'll do it this way...
59 static const ullong_t mask_1 = 0x00000000000000ffLL;
60 static const ullong_t mask_2 = 0x000000000000ffffLL;
61 static const ullong_t mask_4 = 0x00000000ffffffffLL;
62 static const ullong_t mask_8 = 0xffffffffffffffffLL;
65 #define MASK(val, length) ({ \
66 ullong_t mask = 0x0LL; \
84 struct memory_operand {
92 uint_t displacement_size;
93 ullong_t displacement;
99 static v3_op_type_t get_opcode(xed_iform_enum_t iform);
101 static int xed_reg_to_v3_reg(struct guest_info * info, xed_reg_enum_t xed_reg, addr_t * v3_reg, uint_t * reg_len);
102 static int get_memory_operand(struct guest_info * info, xed_decoded_inst_t * xed_instr, uint_t index, struct x86_operand * operand);
104 static int set_decoder_mode(struct guest_info * info, xed_state_t * state) {
105 switch (info->cpu_mode) {
107 if (state->mmode != XED_MACHINE_MODE_LEGACY_16) {
108 xed_state_init(state,
109 XED_MACHINE_MODE_LEGACY_16,
110 XED_ADDRESS_WIDTH_16b,
111 XED_ADDRESS_WIDTH_16b);
116 if (state->mmode != XED_MACHINE_MODE_LEGACY_32) {
117 xed_state_init(state,
118 XED_MACHINE_MODE_LEGACY_32,
119 XED_ADDRESS_WIDTH_32b,
120 XED_ADDRESS_WIDTH_32b);
124 if (state->mmode != XED_MACHINE_MODE_LONG_COMPAT_32) {
125 xed_state_init(state,
126 XED_MACHINE_MODE_LONG_COMPAT_32,
127 XED_ADDRESS_WIDTH_32b,
128 XED_ADDRESS_WIDTH_32b);
132 if (state->mmode != XED_MACHINE_MODE_LONG_64) {
133 PrintDebug("Setting decoder to long mode\n");
134 // state->mmode = XED_MACHINE_MODE_LONG_64;
135 //xed_state_set_machine_mode(state, XED_MACHINE_MODE_LONG_64);
136 xed_state_init(state,
137 XED_MACHINE_MODE_LONG_64,
138 XED_ADDRESS_WIDTH_64b,
139 XED_ADDRESS_WIDTH_64b);
143 PrintError("Unsupported CPU mode: %d\n", info->cpu_mode);
149 static int is_flags_reg(xed_reg_enum_t xed_reg) {
162 int v3_init_decoder(struct guest_info * info) {
163 // Global library initialization, only do it once
164 if (tables_inited == 0) {
169 xed_state_t * decoder_state = (xed_state_t *)V3_Malloc(sizeof(xed_state_t));
170 xed_state_zero(decoder_state);
171 xed_state_init(decoder_state,
172 XED_MACHINE_MODE_LEGACY_32,
173 XED_ADDRESS_WIDTH_32b,
174 XED_ADDRESS_WIDTH_32b);
176 info->decoder_state = decoder_state;
183 int v3_basic_mem_decode(struct guest_info * info, addr_t instr_ptr, struct basic_instr_info * instr_info) {
184 xed_decoded_inst_t xed_instr;
185 xed_error_enum_t xed_error;
188 if (set_decoder_mode(info, info->decoder_state) == -1) {
189 PrintError("Could not set decoder mode\n");
194 xed_decoded_inst_zero_set_mode(&xed_instr, info->decoder_state);
196 xed_error = xed_decode(&xed_instr,
197 REINTERPRET_CAST(const xed_uint8_t *, instr_ptr),
198 XED_MAX_INSTRUCTION_BYTES);
200 if (xed_error != XED_ERROR_NONE) {
201 PrintError("Xed error: %s\n", xed_error_enum_t2str(xed_error));
205 instr_info->instr_length = xed_decoded_inst_get_length(&xed_instr);
208 if (xed_decoded_inst_number_of_memory_operands(&xed_instr) == 0) {
209 PrintError("Tried to decode memory operation with no memory operands\n");
213 instr_info->op_size = xed_decoded_inst_get_memory_operand_length(&xed_instr, 0);
216 xed_category_enum_t cat = xed_decoded_inst_get_category(&xed_instr);
217 if (cat == XED_CATEGORY_STRINGOP) {
218 instr_info->str_op = 1;
220 instr_info->str_op = 0;
223 xed_operand_values_t * operands = xed_decoded_inst_operands(&xed_instr);
224 if (xed_operand_values_has_real_rep(operands)) {
225 instr_info->has_rep = 1;
227 instr_info->has_rep = 0;
234 static int decode_string_op(struct guest_info * info,
235 xed_decoded_inst_t * xed_instr, const xed_inst_t * xi,
236 struct x86_instr * instr) {
238 PrintDebug("String operation\n");
240 if (instr->op_type == V3_OP_MOVS) {
241 instr->num_operands = 2;
243 if (get_memory_operand(info, xed_instr, 0, &(instr->dst_operand)) == -1) {
244 PrintError("Could not get Destination memory operand\n");
248 if (get_memory_operand(info, xed_instr, 1, &(instr->src_operand)) == -1) {
249 PrintError("Could not get Source memory operand\n");
253 if (instr->prefixes.rep == 1) {
255 uint_t reg_length = 0;
257 xed_reg_to_v3_reg(info, xed_decoded_inst_get_reg(xed_instr, XED_OPERAND_REG0), ®_addr, ®_length);
258 instr->str_op_length = MASK(*(addr_t *)reg_addr, reg_length);
260 instr->str_op_length = 1;
263 } else if (instr->op_type == V3_OP_STOS) {
264 instr->num_operands = 2;
266 if (get_memory_operand(info, xed_instr, 0, &(instr->dst_operand)) == -1) {
267 PrintError("Could not get Destination memory operand\n");
271 // STOS reads from rax
272 xed_reg_to_v3_reg(info, xed_decoded_inst_get_reg(xed_instr, XED_OPERAND_REG0),
273 &(instr->src_operand.operand),
274 &(instr->src_operand.size));
275 instr->src_operand.type = REG_OPERAND;
277 if (instr->prefixes.rep == 1) {
279 uint_t reg_length = 0;
281 xed_reg_to_v3_reg(info, xed_decoded_inst_get_reg(xed_instr, XED_OPERAND_REG1), ®_addr, ®_length);
282 instr->str_op_length = MASK(*(addr_t *)reg_addr, reg_length);
284 instr->str_op_length = 1;
288 PrintError("Unhandled String OP\n");
297 int v3_decode(struct guest_info * info, addr_t instr_ptr, struct x86_instr * instr) {
298 xed_decoded_inst_t xed_instr;
299 xed_error_enum_t xed_error;
302 v3_get_prefixes((uchar_t *)instr_ptr, &(instr->prefixes));
304 if (set_decoder_mode(info, info->decoder_state) == -1) {
305 PrintError("Could not set decoder mode\n");
309 xed_decoded_inst_zero_set_mode(&xed_instr, info->decoder_state);
311 xed_error = xed_decode(&xed_instr,
312 REINTERPRET_CAST(const xed_uint8_t *, instr_ptr),
313 XED_MAX_INSTRUCTION_BYTES);
316 if (xed_error != XED_ERROR_NONE) {
317 PrintError("Xed error: %s\n", xed_error_enum_t2str(xed_error));
321 const xed_inst_t * xi = xed_decoded_inst_inst(&xed_instr);
323 instr->instr_length = xed_decoded_inst_get_length(&xed_instr);
326 xed_iform_enum_t iform = xed_decoded_inst_get_iform_enum(&xed_instr);
329 xed_iclass_enum_t iclass = xed_decoded_inst_get_iclass(&xed_instr);
331 PrintDebug("iform=%s, iclass=%s\n", xed_iform_enum_t2str(iform), xed_iclass_enum_t2str(iclass));
335 if ((instr->op_type = get_opcode(iform)) == V3_INVALID_OP) {
336 PrintError("Could not get opcode. (iform=%s)\n", xed_iform_enum_t2str(iform));
341 // We special case the string operations...
342 if (xed_decoded_inst_get_category(&xed_instr) == XED_CATEGORY_STRINGOP) {
343 instr->is_str_op = 1;
344 return decode_string_op(info, &xed_instr, xi, instr);
346 instr->is_str_op = 0;
347 instr->str_op_length = 0;
351 instr->num_operands = xed_decoded_inst_noperands(&xed_instr);
353 if (instr->num_operands > 3) {
354 PrintDebug("Special Case Not Handled\n");
357 } else if (instr->num_operands == 3) {
358 const xed_operand_t * op = xed_inst_operand(xi, 2);
359 xed_operand_enum_t op_enum = xed_operand_name(op);
361 if ((!xed_operand_is_register(op_enum)) ||
362 (!is_flags_reg(xed_decoded_inst_get_reg(&xed_instr, op_enum)))) {
364 PrintError("Special Case not handled (iform=%s)\n", xed_iform_enum_t2str(iform));
371 //PrintDebug("Number of operands: %d\n", instr->num_operands);
372 //PrintDebug("INSTR length: %d\n", instr->instr_length);
375 if (instr->num_operands >= 1) {
376 const xed_operand_t * op = xed_inst_operand(xi, 0);
377 xed_operand_enum_t op_enum = xed_operand_name(op);
379 struct x86_operand * v3_op = NULL;
382 if (xed_operand_written(op)) {
383 v3_op = &(instr->dst_operand);
385 v3_op = &(instr->src_operand);
389 v3_op = &(instr->dst_operand);
391 if (xed_operand_is_register(op_enum)) {
392 xed_reg_enum_t xed_reg = xed_decoded_inst_get_reg(&xed_instr, op_enum);
393 int v3_reg_type = xed_reg_to_v3_reg(info,
398 if (v3_reg_type == -1) {
399 PrintError("First operand is an Unhandled Operand: %s\n", xed_reg_enum_t2str(xed_reg));
400 v3_op->type = INVALID_OPERAND;
402 } else if (v3_reg_type == SEGMENT_REGISTER) {
403 struct v3_segment * seg_reg = (struct v3_segment *)(v3_op->operand);
404 v3_op->operand = (addr_t)&(seg_reg->selector);
407 v3_op->type = REG_OPERAND;
412 case XED_OPERAND_MEM0:
414 PrintDebug("Memory operand (1)\n");
415 if (get_memory_operand(info, &xed_instr, 0, v3_op) == -1) {
416 PrintError("Could not get first memory operand\n");
422 case XED_OPERAND_MEM1:
423 case XED_OPERAND_IMM1:
425 PrintError("Illegal Operand Order\n");
429 case XED_OPERAND_IMM0:
430 case XED_OPERAND_AGEN:
431 case XED_OPERAND_PTR:
432 case XED_OPERAND_RELBR:
434 PrintError("Unhandled Operand Type\n");
442 // set second operand
443 if (instr->num_operands >= 2) {
444 const xed_operand_t * op = xed_inst_operand(xi, 1);
445 // xed_operand_type_enum_t op_type = xed_operand_type(op);
446 xed_operand_enum_t op_enum = xed_operand_name(op);
448 struct x86_operand * v3_op;
451 if (xed_operand_written(op)) {
452 v3_op = &(instr->dst_operand);
454 v3_op = &(instr->src_operand);
457 v3_op = &(instr->src_operand);
459 if (xed_operand_is_register(op_enum)) {
460 xed_reg_enum_t xed_reg = xed_decoded_inst_get_reg(&xed_instr, op_enum);
461 int v3_reg_type = xed_reg_to_v3_reg(info,
465 if (v3_reg_type == -1) {
466 PrintError("Second operand is an Unhandled Operand: %s\n", xed_reg_enum_t2str(xed_reg));
467 v3_op->type = INVALID_OPERAND;
469 } else if (v3_reg_type == SEGMENT_REGISTER) {
470 struct v3_segment * seg_reg = (struct v3_segment *)(v3_op->operand);
471 v3_op->operand = (addr_t)&(seg_reg->selector);
474 v3_op->type = REG_OPERAND;
481 case XED_OPERAND_MEM0:
483 PrintDebug("Memory operand (2)\n");
484 if (get_memory_operand(info, &xed_instr, 0, v3_op) == -1) {
485 PrintError("Could not get first memory operand\n");
491 case XED_OPERAND_IMM0:
493 instr->src_operand.size = xed_decoded_inst_get_immediate_width(&xed_instr);
495 if (instr->src_operand.size > 4) {
496 PrintError("Unhandled 64 bit immediates\n");
499 instr->src_operand.operand = xed_decoded_inst_get_unsigned_immediate(&xed_instr);
501 instr->src_operand.type = IMM_OPERAND;
506 case XED_OPERAND_MEM1:
507 case XED_OPERAND_IMM1:
509 PrintError("Illegal Operand Order\n");
512 case XED_OPERAND_AGEN:
513 case XED_OPERAND_PTR:
514 case XED_OPERAND_RELBR:
516 PrintError("Unhandled Operand Type\n");
524 if (instr->num_operands >= 3) {
525 const xed_operand_t * op = xed_inst_operand(xi, 2);
526 xed_operand_type_enum_t op_type = xed_operand_type(op);
527 xed_operand_enum_t op_enum = xed_operand_name(op);
529 if (xed_operand_is_register(op_enum)) {
530 xed_reg_enum_t xed_reg = xed_decoded_inst_get_reg(&xed_instr, op_enum);
531 int v3_reg_type = xed_reg_to_v3_reg(info,
533 &(instr->third_operand.operand),
534 &(instr->third_operand.size));
536 if (v3_reg_type == -1) {
537 PrintError("Third operand is an Unhandled Operand: %s\n", xed_reg_enum_t2str(xed_reg));
538 instr->third_operand.type = INVALID_OPERAND;
540 } else if (v3_reg_type == SEGMENT_REGISTER) {
541 struct v3_segment * seg_reg = (struct v3_segment *)(instr->third_operand.operand);
542 instr->third_operand.operand = (addr_t)&(seg_reg->selector);
546 instr->third_operand.type = REG_OPERAND;
550 PrintError("Unhandled third operand type %s\n", xed_operand_type_enum_t2str(op_type));
563 int v3_encode(struct guest_info * info, struct x86_instr * instr, char * instr_buf) {
572 static int get_memory_operand(struct guest_info * info, xed_decoded_inst_t * xed_instr, uint_t op_index, struct x86_operand * operand) {
573 struct memory_operand mem_op;
579 ullong_t displacement;
580 int addr_width = v3_get_addr_width(info);;
581 // struct v3_segment * seg_reg;
583 PrintDebug("Xen mode = %s\n", xed_machine_mode_enum_t2str(xed_state_get_machine_mode(info->decoder_state)));
584 PrintDebug("Address width: %s\n",
585 xed_address_width_enum_t2str(xed_state_get_address_width(info->decoder_state)));
586 PrintDebug("Stack Address width: %s\n",
587 xed_address_width_enum_t2str(xed_state_get_stack_address_width(info->decoder_state)));
591 memset((void*)&mem_op, '\0', sizeof(struct memory_operand));
593 xed_reg_enum_t xed_seg = xed_decoded_inst_get_seg_reg(xed_instr, op_index);
594 if (xed_seg != XED_REG_INVALID) {
595 struct v3_segment *tmp_segment;
596 if (xed_reg_to_v3_reg(info, xed_seg, (addr_t *)&tmp_segment, &(mem_op.segment_size)) == -1) {
597 PrintError("Unhandled Segment Register\n");
600 mem_op.segment = tmp_segment->base;
603 xed_reg_enum_t xed_base = xed_decoded_inst_get_base_reg(xed_instr, op_index);
604 if (xed_base != XED_REG_INVALID) {
606 if (xed_reg_to_v3_reg(info, xed_base, &base_reg, &(mem_op.base_size)) == -1) {
607 PrintError("Unhandled Base register\n");
610 mem_op.base = *(addr_t *)base_reg;
615 xed_reg_enum_t xed_idx = xed_decoded_inst_get_index_reg(xed_instr, op_index);
616 if ((op_index == 0) && (xed_idx != XED_REG_INVALID)) {
619 if (xed_reg_to_v3_reg(info, xed_idx, &index_reg, &(mem_op.index_size)) == -1) {
620 PrintError("Unhandled Index Register\n");
624 mem_op.index= *(addr_t *)index_reg;
626 xed_uint_t xed_scale = xed_decoded_inst_get_scale(xed_instr, op_index);
627 if (xed_scale != 0) {
628 mem_op.scale = xed_scale;
633 xed_uint_t disp_bits = xed_decoded_inst_get_memory_displacement_width(xed_instr, op_index);
635 xed_int64_t xed_disp = xed_decoded_inst_get_memory_displacement(xed_instr, op_index);
637 mem_op.displacement_size = disp_bits;
638 mem_op.displacement = xed_disp;
641 operand->type = MEM_OPERAND;
642 operand->size = xed_decoded_inst_get_memory_operand_length(xed_instr, op_index);
646 PrintDebug("Struct: Seg=%p (size=%d), base=%p, index=%p, scale=%p, displacement=%p (size=%d)\n",
647 (void *)mem_op.segment, mem_op.segment_size, (void*)mem_op.base, (void *)mem_op.index,
648 (void *)mem_op.scale, (void *)(addr_t)mem_op.displacement, mem_op.displacement_size);
651 PrintDebug("operand size: %d\n", operand->size);
653 seg = MASK(mem_op.segment, mem_op.segment_size);
654 base = MASK(mem_op.base, mem_op.base_size);
655 index = MASK(mem_op.index, mem_op.index_size);
656 scale = mem_op.scale;
658 // This is a horrendous hack...
659 // XED really screwed the pooch in calculating the displacement
660 if (v3_get_cpu_mode(info) == LONG) {
661 displacement = mem_op.displacement;
663 displacement = MASK(mem_op.displacement, mem_op.displacement_size);
666 PrintDebug("Seg=%p, base=%p, index=%p, scale=%p, displacement=%p\n",
667 (void *)seg, (void *)base, (void *)index, (void *)scale, (void *)(addr_t)displacement);
669 operand->operand = MASK((seg + base + (scale * index) + displacement), addr_width);
675 static int xed_reg_to_v3_reg(struct guest_info * info, xed_reg_enum_t xed_reg, addr_t * v3_reg, uint_t * reg_len) {
677 PrintDebug("Xed Register: %s\n", xed_reg_enum_t2str(xed_reg));
680 case XED_REG_INVALID:
689 *v3_reg = (addr_t)&(info->vm_regs.rax);
693 *v3_reg = (addr_t)&(info->vm_regs.rax);
697 *v3_reg = (addr_t)&(info->vm_regs.rax);
701 *v3_reg = (addr_t)(&(info->vm_regs.rax)) + 1;
705 *v3_reg = (addr_t)&(info->vm_regs.rax);
710 *v3_reg = (addr_t)&(info->vm_regs.rcx);
714 *v3_reg = (addr_t)&(info->vm_regs.rcx);
718 *v3_reg = (addr_t)&(info->vm_regs.rcx);
722 *v3_reg = (addr_t)(&(info->vm_regs.rcx)) + 1;
726 *v3_reg = (addr_t)&(info->vm_regs.rcx);
731 *v3_reg = (addr_t)&(info->vm_regs.rdx);
735 *v3_reg = (addr_t)&(info->vm_regs.rdx);
739 *v3_reg = (addr_t)&(info->vm_regs.rdx);
743 *v3_reg = (addr_t)(&(info->vm_regs.rdx)) + 1;
747 *v3_reg = (addr_t)&(info->vm_regs.rdx);
752 *v3_reg = (addr_t)&(info->vm_regs.rbx);
756 *v3_reg = (addr_t)&(info->vm_regs.rbx);
760 *v3_reg = (addr_t)&(info->vm_regs.rbx);
764 *v3_reg = (addr_t)(&(info->vm_regs.rbx)) + 1;
768 *v3_reg = (addr_t)&(info->vm_regs.rbx);
774 *v3_reg = (addr_t)&(info->vm_regs.rsp);
778 *v3_reg = (addr_t)&(info->vm_regs.rsp);
782 *v3_reg = (addr_t)&(info->vm_regs.rsp);
786 *v3_reg = (addr_t)&(info->vm_regs.rsp);
791 *v3_reg = (addr_t)&(info->vm_regs.rbp);
795 *v3_reg = (addr_t)&(info->vm_regs.rbp);
799 *v3_reg = (addr_t)&(info->vm_regs.rbp);
803 *v3_reg = (addr_t)&(info->vm_regs.rbp);
810 *v3_reg = (addr_t)&(info->vm_regs.rsi);
814 *v3_reg = (addr_t)&(info->vm_regs.rsi);
818 *v3_reg = (addr_t)&(info->vm_regs.rsi);
822 *v3_reg = (addr_t)&(info->vm_regs.rsi);
828 *v3_reg = (addr_t)&(info->vm_regs.rdi);
832 *v3_reg = (addr_t)&(info->vm_regs.rdi);
836 *v3_reg = (addr_t)&(info->vm_regs.rdi);
840 *v3_reg = (addr_t)&(info->vm_regs.rdi);
849 *v3_reg = (addr_t)&(info->vm_regs.r8);
853 *v3_reg = (addr_t)&(info->vm_regs.r8);
857 *v3_reg = (addr_t)&(info->vm_regs.r8);
861 *v3_reg = (addr_t)&(info->vm_regs.r8);
866 *v3_reg = (addr_t)&(info->vm_regs.r9);
870 *v3_reg = (addr_t)&(info->vm_regs.r9);
874 *v3_reg = (addr_t)&(info->vm_regs.r9);
878 *v3_reg = (addr_t)&(info->vm_regs.r9);
883 *v3_reg = (addr_t)&(info->vm_regs.r10);
887 *v3_reg = (addr_t)&(info->vm_regs.r10);
891 *v3_reg = (addr_t)&(info->vm_regs.r10);
895 *v3_reg = (addr_t)&(info->vm_regs.r10);
900 *v3_reg = (addr_t)&(info->vm_regs.r11);
904 *v3_reg = (addr_t)&(info->vm_regs.r11);
908 *v3_reg = (addr_t)&(info->vm_regs.r11);
912 *v3_reg = (addr_t)&(info->vm_regs.r11);
917 *v3_reg = (addr_t)&(info->vm_regs.r12);
921 *v3_reg = (addr_t)&(info->vm_regs.r12);
925 *v3_reg = (addr_t)&(info->vm_regs.r12);
929 *v3_reg = (addr_t)&(info->vm_regs.r12);
934 *v3_reg = (addr_t)&(info->vm_regs.r13);
938 *v3_reg = (addr_t)&(info->vm_regs.r13);
942 *v3_reg = (addr_t)&(info->vm_regs.r13);
946 *v3_reg = (addr_t)&(info->vm_regs.r13);
951 *v3_reg = (addr_t)&(info->vm_regs.r14);
955 *v3_reg = (addr_t)&(info->vm_regs.r14);
959 *v3_reg = (addr_t)&(info->vm_regs.r14);
963 *v3_reg = (addr_t)&(info->vm_regs.r14);
968 *v3_reg = (addr_t)&(info->vm_regs.r15);
972 *v3_reg = (addr_t)&(info->vm_regs.r15);
976 *v3_reg = (addr_t)&(info->vm_regs.r15);
980 *v3_reg = (addr_t)&(info->vm_regs.r15);
989 *v3_reg = (addr_t)&(info->rip);
991 return CTRL_REGISTER;
993 *v3_reg = (addr_t)&(info->rip);
995 return CTRL_REGISTER;
997 *v3_reg = (addr_t)&(info->rip);
999 return CTRL_REGISTER;
1002 *v3_reg = (addr_t)&(info->ctrl_regs.rflags);
1004 return CTRL_REGISTER;
1005 case XED_REG_EFLAGS:
1006 *v3_reg = (addr_t)&(info->ctrl_regs.rflags);
1008 return CTRL_REGISTER;
1009 case XED_REG_RFLAGS:
1010 *v3_reg = (addr_t)&(info->ctrl_regs.rflags);
1012 return CTRL_REGISTER;
1015 *v3_reg = (addr_t)&(info->ctrl_regs.cr0);
1017 return CTRL_REGISTER;
1019 *v3_reg = (addr_t)&(info->ctrl_regs.cr2);
1021 return CTRL_REGISTER;
1023 *v3_reg = (addr_t)&(info->ctrl_regs.cr3);
1025 return CTRL_REGISTER;
1027 *v3_reg = (addr_t)&(info->ctrl_regs.cr4);
1029 return CTRL_REGISTER;
1031 *v3_reg = (addr_t)&(info->ctrl_regs.cr8);
1033 return CTRL_REGISTER;
1055 *v3_reg = (addr_t)&(info->segments.cs);
1057 return SEGMENT_REGISTER;
1059 *v3_reg = (addr_t)&(info->segments.ds);
1061 return SEGMENT_REGISTER;
1063 *v3_reg = (addr_t)&(info->segments.es);
1065 return SEGMENT_REGISTER;
1067 *v3_reg = (addr_t)&(info->segments.ss);
1069 return SEGMENT_REGISTER;
1071 *v3_reg = (addr_t)&(info->segments.fs);
1073 return SEGMENT_REGISTER;
1075 *v3_reg = (addr_t)&(info->segments.gs);
1077 return SEGMENT_REGISTER;
1084 PrintError("Segment selector operand... Don't know how to handle this...\n");
1149 case XED_REG_STACKPUSH:
1150 case XED_REG_STACKPOP:
1153 case XED_REG_TSCAUX:
1156 case XED_REG_X87CONTROL:
1157 case XED_REG_X87STATUS:
1158 case XED_REG_X87TOP:
1159 case XED_REG_X87TAG:
1160 case XED_REG_X87PUSH:
1161 case XED_REG_X87POP:
1162 case XED_REG_X87POP2:
1197 static v3_op_type_t get_opcode(xed_iform_enum_t iform) {
1201 /* Control Instructions */
1203 case XED_IFORM_MOV_CR_GPR64_CR:
1204 case XED_IFORM_MOV_CR_GPR32_CR:
1205 return V3_OP_MOVCR2;
1207 case XED_IFORM_MOV_CR_CR_GPR64:
1208 case XED_IFORM_MOV_CR_CR_GPR32:
1209 return V3_OP_MOV2CR;
1211 case XED_IFORM_SMSW_GPRv:
1214 case XED_IFORM_LMSW_GPR16:
1217 case XED_IFORM_CLTS:
1220 case XED_IFORM_INVLPG_MEMb:
1221 return V3_OP_INVLPG;
1224 /* Data Instructions */
1227 case XED_IFORM_ADC_MEMv_GPRv:
1228 case XED_IFORM_ADC_MEMv_IMM:
1229 case XED_IFORM_ADC_MEMb_GPR8:
1230 case XED_IFORM_ADC_MEMb_IMM:
1232 case XED_IFORM_ADC_GPRv_MEMv:
1233 case XED_IFORM_ADC_GPR8_MEMb:
1237 case XED_IFORM_ADD_MEMv_GPRv:
1238 case XED_IFORM_ADD_MEMb_IMM:
1239 case XED_IFORM_ADD_MEMb_GPR8:
1240 case XED_IFORM_ADD_MEMv_IMM:
1242 case XED_IFORM_ADD_GPRv_MEMv:
1243 case XED_IFORM_ADD_GPR8_MEMb:
1247 case XED_IFORM_AND_MEMv_IMM:
1248 case XED_IFORM_AND_MEMb_GPR8:
1249 case XED_IFORM_AND_MEMv_GPRv:
1250 case XED_IFORM_AND_MEMb_IMM:
1252 case XED_IFORM_AND_GPR8_MEMb:
1253 case XED_IFORM_AND_GPRv_MEMv:
1257 case XED_IFORM_SUB_MEMv_IMM:
1258 case XED_IFORM_SUB_MEMb_GPR8:
1259 case XED_IFORM_SUB_MEMb_IMM:
1260 case XED_IFORM_SUB_MEMv_GPRv:
1262 case XED_IFORM_SUB_GPR8_MEMb:
1263 case XED_IFORM_SUB_GPRv_MEMv:
1267 case XED_IFORM_MOV_MEMv_GPRv:
1268 case XED_IFORM_MOV_MEMb_GPR8:
1269 case XED_IFORM_MOV_MEMv_OrAX:
1270 case XED_IFORM_MOV_MEMb_AL:
1271 case XED_IFORM_MOV_MEMv_IMM:
1272 case XED_IFORM_MOV_MEMb_IMM:
1274 case XED_IFORM_MOV_GPRv_MEMv:
1275 case XED_IFORM_MOV_GPR8_MEMb:
1276 case XED_IFORM_MOV_OrAX_MEMv:
1277 case XED_IFORM_MOV_AL_MEMb:
1282 case XED_IFORM_MOVZX_GPRv_MEMb:
1283 case XED_IFORM_MOVZX_GPRv_MEMw:
1287 case XED_IFORM_MOVSX_GPRv_MEMb:
1288 case XED_IFORM_MOVSX_GPRv_MEMw:
1293 case XED_IFORM_DEC_MEMv:
1294 case XED_IFORM_DEC_MEMb:
1297 case XED_IFORM_INC_MEMb:
1298 case XED_IFORM_INC_MEMv:
1302 case XED_IFORM_OR_MEMv_IMM:
1303 case XED_IFORM_OR_MEMb_IMM:
1304 case XED_IFORM_OR_MEMv_GPRv:
1305 case XED_IFORM_OR_MEMb_GPR8:
1307 case XED_IFORM_OR_GPRv_MEMv:
1308 case XED_IFORM_OR_GPR8_MEMb:
1312 case XED_IFORM_XOR_MEMv_GPRv:
1313 case XED_IFORM_XOR_MEMb_IMM:
1314 case XED_IFORM_XOR_MEMb_GPR8:
1315 case XED_IFORM_XOR_MEMv_IMM:
1317 case XED_IFORM_XOR_GPRv_MEMv:
1318 case XED_IFORM_XOR_GPR8_MEMb:
1321 case XED_IFORM_NEG_MEMb:
1322 case XED_IFORM_NEG_MEMv:
1325 case XED_IFORM_NOT_MEMv:
1326 case XED_IFORM_NOT_MEMb:
1329 case XED_IFORM_XCHG_MEMv_GPRv:
1330 case XED_IFORM_XCHG_MEMb_GPR8:
1333 case XED_IFORM_SETB_MEMb:
1336 case XED_IFORM_SETBE_MEMb:
1339 case XED_IFORM_SETL_MEMb:
1342 case XED_IFORM_SETLE_MEMb:
1345 case XED_IFORM_SETNB_MEMb:
1348 case XED_IFORM_SETNBE_MEMb:
1349 return V3_OP_SETNBE;
1351 case XED_IFORM_SETNL_MEMb:
1354 case XED_IFORM_SETNLE_MEMb:
1355 return V3_OP_SETNLE;
1357 case XED_IFORM_SETNO_MEMb:
1360 case XED_IFORM_SETNP_MEMb:
1363 case XED_IFORM_SETNS_MEMb:
1366 case XED_IFORM_SETNZ_MEMb:
1369 case XED_IFORM_SETO_MEMb:
1372 case XED_IFORM_SETP_MEMb:
1375 case XED_IFORM_SETS_MEMb:
1378 case XED_IFORM_SETZ_MEMb:
1381 case XED_IFORM_MOVSB:
1382 case XED_IFORM_MOVSW:
1383 case XED_IFORM_MOVSD:
1384 case XED_IFORM_MOVSQ:
1387 case XED_IFORM_STOSB:
1388 case XED_IFORM_STOSW:
1389 case XED_IFORM_STOSD:
1390 case XED_IFORM_STOSQ:
1395 return V3_INVALID_OP;