2 * This file is part of the Palacios Virtual Machine Monitor developed
3 * by the V3VEE Project with funding from the United States National
4 * Science Foundation and the Department of Energy.
6 * The V3VEE Project is a joint project between Northwestern University
7 * and the University of New Mexico. You can find out more at
10 * Copyright (c) 2011, Jack Lange <jarusl@cs.northwestern.edu>
11 * Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org>
12 * All rights reserved.
14 * Author: Alexander Kudryavtsev <alexk@ispras.ru>
16 * This is free software. You are permitted to use,
17 * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
20 #include <palacios/vmm.h>
21 #include <palacios/vm_guest.h>
22 #include <palacios/vmm_mem_hook.h>
23 #include <palacios/vmm_emulator.h>
24 #include <palacios/vm_guest_mem.h>
25 #include <palacios/vmm_hashtable.h>
26 #include <palacios/vmm_decoder.h>
28 #include <quix86/quix86.h>
30 #ifndef V3_CONFIG_DEBUG_DECODER
32 #define PrintDebug(fmt, args...)
35 #define GPR_REGISTER 0
36 #define SEGMENT_REGISTER 1
37 #define CTRL_REGISTER 2
38 #define DEBUG_REGISTER 3
40 // QUIX86 does not have to be initialised or deinitialised.
41 int v3_init_decoder(struct guest_info * core) {
44 int v3_deinit_decoder(struct guest_info * core) {
48 static int get_opcode(qx86_insn *inst);
49 static int qx86_register_to_v3_reg(struct guest_info * info, int qx86_reg,
50 addr_t * v3_reg, uint_t * reg_len);
52 static int decode_string_op(struct guest_info * info,
53 const qx86_insn * qx86_inst, struct x86_instr * instr)
56 PrintDebug("String operation\n");
58 if (instr->prefixes.rep == 1) {
59 uint64_t a_mask = ~(~0ULL <<
60 (QX86_SIZE_OCTETS(qx86_inst->attributes.addressSize) * 8));
62 instr->str_op_length = info->vm_regs.rcx & a_mask;
64 instr->str_op_length = 1;
68 if (instr->op_type == V3_OP_MOVS) {
69 instr->num_operands = 2;
71 if((status = qx86_calculate_linear_address(qx86_inst, 0,
72 (qx86_uint64*)&instr->dst_operand.operand)) != QX86_SUCCESS) {
73 PrintError("Could not get destination memory operand: "
74 "qx86_calculate_linear_address: %d\n", status);
78 if((status = qx86_calculate_linear_address(qx86_inst, 1,
79 (qx86_uint64*)&instr->src_operand.operand)) != QX86_SUCCESS) {
80 PrintError("Could not get source memory operand: "
81 "qx86_calculate_linear_address: %d\n", status);
85 instr->dst_operand.write = 1;
86 instr->src_operand.read = 1;
88 } else if (instr->op_type == V3_OP_STOS) {
89 instr->num_operands = 2;
91 if((status = qx86_calculate_linear_address(qx86_inst, 0,
92 (qx86_uint64*)&instr->dst_operand.operand)) != QX86_SUCCESS) {
93 PrintError("Could not get destination memory operand: "
94 "qx86_calculate_linear_address: %d\n", status);
98 // STOS reads from rax
99 qx86_register_to_v3_reg(info,
100 qx86_inst->operands[1].u.r.rindex,
101 &(instr->src_operand.operand), &(instr->src_operand.size));
102 instr->src_operand.type = REG_OPERAND;
104 instr->src_operand.read = 1;
105 instr->dst_operand.write = 1;
108 PrintError("Unhandled String OP\n");
115 static int callback(void *data, int rindex, int subreg, unsigned char *value) {
119 struct guest_info *info = (struct guest_info*)data;
120 int v3_reg_type = qx86_register_to_v3_reg(info,
122 (addr_t*)®_addr, ®_size);
124 if(v3_reg_type == -1) {
125 PrintError("Callback failed to get register index %d\n", rindex);
129 *(uint64_t*)value = 0;
131 case QX86_SUBREG_BASE:
132 *(uint64_t*)value = ((struct v3_segment*)reg_addr)->base;
134 case QX86_SUBREG_LIMIT:
135 *(uint32_t*)value = ((struct v3_segment*)reg_addr)->limit;
137 case QX86_SUBREG_FLAGS:
138 PrintError("Callback doesn't know how to give flags.\n");
140 case QX86_SUBREG_NONE: {
141 switch(qx86_rtab[rindex].size) {
142 case 1: *(uint8_t* )value = *(uint8_t* )reg_addr; break;
143 case 2: *(uint16_t*)value = *(uint16_t*)reg_addr; break;
144 case 4: *(uint32_t*)value = *(uint32_t*)reg_addr; break;
145 case 8: *(uint64_t*)value = *(uint64_t*)reg_addr; break;
154 static inline int qx86_op_to_v3_op(struct guest_info *info, qx86_insn *qx86_insn,
155 int op_num, struct x86_operand * v3_op) {
157 qx86_operand *qx86_op = &qx86_insn->operands[op_num];
158 if (qx86_op->ot == QX86_OPERAND_TYPE_REGISTER) {
159 int v3_reg_type = qx86_register_to_v3_reg(info,
161 &(v3_op->operand), &(v3_op->size));
163 if (v3_reg_type == -1) {
164 PrintError("Operand %d is an Unhandled Operand: %s\n", op_num,
165 qx86_rtab[qx86_op->u.r.rindex].name);
166 v3_op->type = INVALID_OPERAND;
168 } else if (v3_reg_type == SEGMENT_REGISTER) {
169 struct v3_segment * seg_reg = (struct v3_segment *)(v3_op->operand);
170 v3_op->operand = (addr_t)&(seg_reg->selector);
172 v3_op->type = REG_OPERAND;
174 } else if(qx86_op->ot == QX86_OPERAND_TYPE_MEMORY) {
175 PrintDebug("Memory operand (%d)\n", op_num);
176 if((status = qx86_calculate_linear_address(qx86_insn, op_num,
177 (qx86_uint64*)&v3_op->operand)) != QX86_SUCCESS) {
178 PrintError("Could not get memory operand %d: "
179 "qx86_calculate_linear_address() returns %d\n", op_num, status);
182 v3_op->type = MEM_OPERAND;
183 v3_op->size = qx86_op->size;
185 } else if(qx86_op->ot == QX86_OPERAND_TYPE_IMMEDIATE) {
186 v3_op->size = qx86_op->u.i.valueSize;
188 if (v3_op->size > 4) {
189 PrintError("Unhandled 64 bit immediates\n");
192 v3_op->operand = (addr_t)*(uint64_t*)qx86_op->u.i.value;
193 v3_op->type = IMM_OPERAND;
196 PrintError("Unhandled Operand %d Type %d\n", op_num, qx86_op->ot);
200 if (qx86_op->attributes & QX86_OPERAND_ATTRIBUTE_READ) {
203 if (qx86_op->attributes & QX86_OPERAND_ATTRIBUTE_WRITTEN) {
209 int v3_decode(struct guest_info * info, addr_t instr_ptr, struct x86_instr * instr) {
212 uint8_t inst_buf[QX86_INSN_SIZE_MAX];
214 memset(instr, 0, sizeof(struct x86_instr));
215 memset(&qx86_inst, 0, sizeof(qx86_inst));
217 v3_get_prefixes((uchar_t *)instr_ptr, &(instr->prefixes));
219 switch(v3_get_vm_cpu_mode(info)) {
220 case REAL: case LONG_16_COMPAT:
221 proc_mode = QX86_SIZE_16; break;
222 case PROTECTED: case PROTECTED_PAE: case LONG_32_COMPAT:
223 proc_mode = QX86_SIZE_32; break;
225 proc_mode = QX86_SIZE_64; break;
227 PrintError("Unsupported CPU mode: %d\n", info->cpu_mode);
231 int left_in_page = 0x1000 - (instr_ptr & 0xfff);
232 if(left_in_page < QX86_INSN_SIZE_MAX) {
236 if (info->mem_mode == PHYSICAL_MEM) {
237 status = v3_gpa_to_hva(info, get_addr_linear(info,
238 (info->rip & ~0xfffULL) + 0x1000, &(info->segments.cs)), &instr_ptr2);
240 status = v3_gva_to_hva(info, get_addr_linear(info,
241 (info->rip & ~0xfffULL) + 0x1000, &(info->segments.cs)), &instr_ptr2);
244 PrintError("Could not translate Instruction Address at second stage "
245 "translation (%p)\n", (void *)(addr_t)info->rip);
249 if(((instr_ptr & ~0xfffUL) + 0x1000) != instr_ptr2) {
250 PrintError("Note: physical page non-contiguous\n");
251 memcpy(inst_buf, (const void*)instr_ptr, left_in_page);
252 memcpy(inst_buf + left_in_page, (const void*)instr_ptr2,
253 QX86_INSN_SIZE_MAX - left_in_page);
254 instr_ptr = (addr_t)inst_buf;
255 } // in other case, address space is contiguous and everything is OK
258 qx86_inst.callback = callback;
259 qx86_inst.data = info;
261 int status = qx86_decode(&qx86_inst, proc_mode,
262 (const void*)instr_ptr, QX86_INSN_SIZE_MAX);
263 if(status != QX86_SUCCESS) {
264 PrintError("qx86_decode() returned %d\n", status);
268 instr->instr_length = qx86_inst.rawSize;
270 if ((instr->op_type = get_opcode(&qx86_inst)) == V3_INVALID_OP) {
271 PrintError("Could not get opcode. (mnemonic=%s)\n",
272 qx86_mtab[qx86_inst.mnemonic].name);
276 if(instr->op_type == V3_OP_MOVS || instr->op_type == V3_OP_STOS) {
277 instr->is_str_op = 1;
278 return decode_string_op(info, &qx86_inst, instr);
280 instr->is_str_op = 0;
281 instr->str_op_length = 0;
284 instr->num_operands = qx86_inst.operandCount;
287 if (instr->num_operands >= 1) {
288 if (qx86_op_to_v3_op(info, &qx86_inst, 0, &instr->dst_operand) != 0)
292 // set second operand
293 if (instr->num_operands >= 2) {
294 if (qx86_op_to_v3_op(info, &qx86_inst, 1, &instr->src_operand) != 0)
299 if (instr->num_operands >= 3) {
300 if (qx86_op_to_v3_op(info, &qx86_inst, 2, &instr->third_operand) != 0)
304 #ifdef V3_CONFIG_DEBUG_DECODER
305 qx86_print_options_intel opt;
308 if(qx86_print_intel(&qx86_inst, &opt, buf, &buf_sz) != QX86_SUCCESS) {
309 PrintDebug("Print failed!\n");
311 PrintDebug("Instruction (%p): %s\n", (void*)info->rip, buf);
313 PrintDebug("Operands: dst %p src %p 3rd %p\n", (void*)instr->dst_operand.operand,
314 (void*)instr->src_operand.operand, (void*)instr->third_operand.operand);
319 static int get_opcode(qx86_insn *inst) {
320 switch (inst->mnemonic) {
321 #define IS_CR(op) inst->operands[op].ot == QX86_OPERAND_TYPE_REGISTER && \
322 qx86_rtab[inst->operands[op].u.r.rindex].rclass == QX86_RCLASS_CREG
325 case QX86_MNEMONIC_MOV: {
326 if(inst->operands[0].ot == QX86_OPERAND_TYPE_MEMORY
327 || inst->operands[1].ot == QX86_OPERAND_TYPE_MEMORY)
334 PrintError("Bad operand types for MOV: %d %d\n", inst->operands[0].ot,
335 inst->operands[1].ot);
336 return V3_INVALID_OP;
339 /* Control Instructions */
340 case QX86_MNEMONIC_SMSW:
343 case QX86_MNEMONIC_LMSW:
346 case QX86_MNEMONIC_CLTS:
349 case QX86_MNEMONIC_INVLPG:
352 /* Data Instructions */
353 case QX86_MNEMONIC_ADC:
356 case QX86_MNEMONIC_ADD:
359 case QX86_MNEMONIC_AND:
362 case QX86_MNEMONIC_SUB:
366 case QX86_MNEMONIC_MOVZX:
369 case QX86_MNEMONIC_MOVSX:
373 case QX86_MNEMONIC_DEC:
376 case QX86_MNEMONIC_INC:
379 case QX86_MNEMONIC_OR:
382 case QX86_MNEMONIC_XOR:
385 case QX86_MNEMONIC_NEG:
388 case QX86_MNEMONIC_NOT:
391 case QX86_MNEMONIC_XCHG:
394 case QX86_MNEMONIC_SETB:
397 case QX86_MNEMONIC_SETBE:
400 case QX86_MNEMONIC_SETL:
403 case QX86_MNEMONIC_SETLE:
406 case QX86_MNEMONIC_SETAE:
409 case QX86_MNEMONIC_SETA:
412 case QX86_MNEMONIC_SETGE:
415 case QX86_MNEMONIC_SETG:
418 case QX86_MNEMONIC_SETNO:
421 case QX86_MNEMONIC_SETNP:
424 case QX86_MNEMONIC_SETNS:
427 case QX86_MNEMONIC_SETNZ:
430 case QX86_MNEMONIC_SETO:
433 case QX86_MNEMONIC_SETP:
436 case QX86_MNEMONIC_SETS:
439 case QX86_MNEMONIC_SETZ:
442 case QX86_MNEMONIC_MOVSB:
443 case QX86_MNEMONIC_MOVSW:
444 case QX86_MNEMONIC_MOVSD:
445 case QX86_MNEMONIC_MOVSQ:
448 case QX86_MNEMONIC_STOSB:
449 case QX86_MNEMONIC_STOSW:
450 case QX86_MNEMONIC_STOSD:
451 case QX86_MNEMONIC_STOSQ:
456 return V3_INVALID_OP;
460 static int qx86_register_to_v3_reg(struct guest_info * info, int qx86_reg,
461 addr_t * v3_reg, uint_t * reg_len) {
462 PrintDebug("qx86 Register: %s\n", qx86_rtab[qx86_reg].name);
465 case QX86_REGISTER_INVALID:
470 case QX86_REGISTER_RAX:
471 *v3_reg = (addr_t)&(info->vm_regs.rax);
474 case QX86_REGISTER_EAX:
475 *v3_reg = (addr_t)&(info->vm_regs.rax);
478 case QX86_REGISTER_AX:
479 *v3_reg = (addr_t)&(info->vm_regs.rax);
482 case QX86_REGISTER_AH:
483 *v3_reg = (addr_t)(&(info->vm_regs.rax)) + 1;
486 case QX86_REGISTER_AL:
487 *v3_reg = (addr_t)&(info->vm_regs.rax);
491 case QX86_REGISTER_RCX:
492 *v3_reg = (addr_t)&(info->vm_regs.rcx);
495 case QX86_REGISTER_ECX:
496 *v3_reg = (addr_t)&(info->vm_regs.rcx);
499 case QX86_REGISTER_CX:
500 *v3_reg = (addr_t)&(info->vm_regs.rcx);
503 case QX86_REGISTER_CH:
504 *v3_reg = (addr_t)(&(info->vm_regs.rcx)) + 1;
507 case QX86_REGISTER_CL:
508 *v3_reg = (addr_t)&(info->vm_regs.rcx);
512 case QX86_REGISTER_RDX:
513 *v3_reg = (addr_t)&(info->vm_regs.rdx);
516 case QX86_REGISTER_EDX:
517 *v3_reg = (addr_t)&(info->vm_regs.rdx);
520 case QX86_REGISTER_DX:
521 *v3_reg = (addr_t)&(info->vm_regs.rdx);
524 case QX86_REGISTER_DH:
525 *v3_reg = (addr_t)(&(info->vm_regs.rdx)) + 1;
528 case QX86_REGISTER_DL:
529 *v3_reg = (addr_t)&(info->vm_regs.rdx);
533 case QX86_REGISTER_RBX:
534 *v3_reg = (addr_t)&(info->vm_regs.rbx);
537 case QX86_REGISTER_EBX:
538 *v3_reg = (addr_t)&(info->vm_regs.rbx);
541 case QX86_REGISTER_BX:
542 *v3_reg = (addr_t)&(info->vm_regs.rbx);
545 case QX86_REGISTER_BH:
546 *v3_reg = (addr_t)(&(info->vm_regs.rbx)) + 1;
549 case QX86_REGISTER_BL:
550 *v3_reg = (addr_t)&(info->vm_regs.rbx);
555 case QX86_REGISTER_RSP:
556 *v3_reg = (addr_t)&(info->vm_regs.rsp);
559 case QX86_REGISTER_ESP:
560 *v3_reg = (addr_t)&(info->vm_regs.rsp);
563 case QX86_REGISTER_SP:
564 *v3_reg = (addr_t)&(info->vm_regs.rsp);
567 case QX86_REGISTER_SPL:
568 *v3_reg = (addr_t)&(info->vm_regs.rsp);
572 case QX86_REGISTER_RBP:
573 *v3_reg = (addr_t)&(info->vm_regs.rbp);
576 case QX86_REGISTER_EBP:
577 *v3_reg = (addr_t)&(info->vm_regs.rbp);
580 case QX86_REGISTER_BP:
581 *v3_reg = (addr_t)&(info->vm_regs.rbp);
584 case QX86_REGISTER_BPL:
585 *v3_reg = (addr_t)&(info->vm_regs.rbp);
591 case QX86_REGISTER_RSI:
592 *v3_reg = (addr_t)&(info->vm_regs.rsi);
595 case QX86_REGISTER_ESI:
596 *v3_reg = (addr_t)&(info->vm_regs.rsi);
599 case QX86_REGISTER_SI:
600 *v3_reg = (addr_t)&(info->vm_regs.rsi);
603 case QX86_REGISTER_SIL:
604 *v3_reg = (addr_t)&(info->vm_regs.rsi);
609 case QX86_REGISTER_RDI:
610 *v3_reg = (addr_t)&(info->vm_regs.rdi);
613 case QX86_REGISTER_EDI:
614 *v3_reg = (addr_t)&(info->vm_regs.rdi);
617 case QX86_REGISTER_DI:
618 *v3_reg = (addr_t)&(info->vm_regs.rdi);
621 case QX86_REGISTER_DIL:
622 *v3_reg = (addr_t)&(info->vm_regs.rdi);
630 case QX86_REGISTER_R8:
631 *v3_reg = (addr_t)&(info->vm_regs.r8);
634 case QX86_REGISTER_R8D:
635 *v3_reg = (addr_t)&(info->vm_regs.r8);
638 case QX86_REGISTER_R8W:
639 *v3_reg = (addr_t)&(info->vm_regs.r8);
642 case QX86_REGISTER_R8B:
643 *v3_reg = (addr_t)&(info->vm_regs.r8);
647 case QX86_REGISTER_R9:
648 *v3_reg = (addr_t)&(info->vm_regs.r9);
651 case QX86_REGISTER_R9D:
652 *v3_reg = (addr_t)&(info->vm_regs.r9);
655 case QX86_REGISTER_R9W:
656 *v3_reg = (addr_t)&(info->vm_regs.r9);
659 case QX86_REGISTER_R9B:
660 *v3_reg = (addr_t)&(info->vm_regs.r9);
664 case QX86_REGISTER_R10:
665 *v3_reg = (addr_t)&(info->vm_regs.r10);
668 case QX86_REGISTER_R10D:
669 *v3_reg = (addr_t)&(info->vm_regs.r10);
672 case QX86_REGISTER_R10W:
673 *v3_reg = (addr_t)&(info->vm_regs.r10);
676 case QX86_REGISTER_R10B:
677 *v3_reg = (addr_t)&(info->vm_regs.r10);
681 case QX86_REGISTER_R11:
682 *v3_reg = (addr_t)&(info->vm_regs.r11);
685 case QX86_REGISTER_R11D:
686 *v3_reg = (addr_t)&(info->vm_regs.r11);
689 case QX86_REGISTER_R11W:
690 *v3_reg = (addr_t)&(info->vm_regs.r11);
693 case QX86_REGISTER_R11B:
694 *v3_reg = (addr_t)&(info->vm_regs.r11);
698 case QX86_REGISTER_R12:
699 *v3_reg = (addr_t)&(info->vm_regs.r12);
702 case QX86_REGISTER_R12D:
703 *v3_reg = (addr_t)&(info->vm_regs.r12);
706 case QX86_REGISTER_R12W:
707 *v3_reg = (addr_t)&(info->vm_regs.r12);
710 case QX86_REGISTER_R12B:
711 *v3_reg = (addr_t)&(info->vm_regs.r12);
715 case QX86_REGISTER_R13:
716 *v3_reg = (addr_t)&(info->vm_regs.r13);
719 case QX86_REGISTER_R13D:
720 *v3_reg = (addr_t)&(info->vm_regs.r13);
723 case QX86_REGISTER_R13W:
724 *v3_reg = (addr_t)&(info->vm_regs.r13);
727 case QX86_REGISTER_R13B:
728 *v3_reg = (addr_t)&(info->vm_regs.r13);
732 case QX86_REGISTER_R14:
733 *v3_reg = (addr_t)&(info->vm_regs.r14);
736 case QX86_REGISTER_R14D:
737 *v3_reg = (addr_t)&(info->vm_regs.r14);
740 case QX86_REGISTER_R14W:
741 *v3_reg = (addr_t)&(info->vm_regs.r14);
744 case QX86_REGISTER_R14B:
745 *v3_reg = (addr_t)&(info->vm_regs.r14);
749 case QX86_REGISTER_R15:
750 *v3_reg = (addr_t)&(info->vm_regs.r15);
753 case QX86_REGISTER_R15D:
754 *v3_reg = (addr_t)&(info->vm_regs.r15);
757 case QX86_REGISTER_R15W:
758 *v3_reg = (addr_t)&(info->vm_regs.r15);
761 case QX86_REGISTER_R15B:
762 *v3_reg = (addr_t)&(info->vm_regs.r15);
767 case QX86_REGISTER_RIP:
768 *v3_reg = (addr_t)&(info->rip);
770 return CTRL_REGISTER;
771 case QX86_REGISTER_EIP:
772 *v3_reg = (addr_t)&(info->rip);
774 return CTRL_REGISTER;
775 case QX86_REGISTER_IP:
776 *v3_reg = (addr_t)&(info->rip);
778 return CTRL_REGISTER;
780 case QX86_REGISTER_FLAGS:
781 *v3_reg = (addr_t)&(info->ctrl_regs.rflags);
783 return CTRL_REGISTER;
784 case QX86_REGISTER_EFLAGS:
785 *v3_reg = (addr_t)&(info->ctrl_regs.rflags);
787 return CTRL_REGISTER;
788 case QX86_REGISTER_RFLAGS:
789 *v3_reg = (addr_t)&(info->ctrl_regs.rflags);
791 return CTRL_REGISTER;
793 case QX86_REGISTER_CR0:
794 *v3_reg = (addr_t)&(info->ctrl_regs.cr0);
796 return CTRL_REGISTER;
797 case QX86_REGISTER_CR2:
798 *v3_reg = (addr_t)&(info->ctrl_regs.cr2);
800 return CTRL_REGISTER;
801 case QX86_REGISTER_CR3:
802 *v3_reg = (addr_t)&(info->ctrl_regs.cr3);
804 return CTRL_REGISTER;
805 case QX86_REGISTER_CR4:
806 *v3_reg = (addr_t)&(info->ctrl_regs.cr4);
808 return CTRL_REGISTER;
809 case QX86_REGISTER_CR8:
810 *v3_reg = (addr_t)&(info->ctrl_regs.cr8);
812 return CTRL_REGISTER;
814 case QX86_REGISTER_CR1:
815 case QX86_REGISTER_CR5:
816 case QX86_REGISTER_CR6:
817 case QX86_REGISTER_CR7:
818 case QX86_REGISTER_CR9:
819 case QX86_REGISTER_CR10:
820 case QX86_REGISTER_CR11:
821 case QX86_REGISTER_CR12:
822 case QX86_REGISTER_CR13:
823 case QX86_REGISTER_CR14:
824 case QX86_REGISTER_CR15:
828 case QX86_REGISTER_CS:
829 *v3_reg = (addr_t)&(info->segments.cs);
831 return SEGMENT_REGISTER;
832 case QX86_REGISTER_DS:
833 *v3_reg = (addr_t)&(info->segments.ds);
835 return SEGMENT_REGISTER;
836 case QX86_REGISTER_ES:
837 *v3_reg = (addr_t)&(info->segments.es);
839 return SEGMENT_REGISTER;
840 case QX86_REGISTER_SS:
841 *v3_reg = (addr_t)&(info->segments.ss);
843 return SEGMENT_REGISTER;
844 case QX86_REGISTER_FS:
845 *v3_reg = (addr_t)&(info->segments.fs);
847 return SEGMENT_REGISTER;
848 case QX86_REGISTER_GS:
849 *v3_reg = (addr_t)&(info->segments.gs);
851 return SEGMENT_REGISTER;
854 case QX86_REGISTER_DR0:
855 case QX86_REGISTER_DR1:
856 case QX86_REGISTER_DR2:
857 case QX86_REGISTER_DR3:
858 case QX86_REGISTER_DR4:
859 case QX86_REGISTER_DR5:
860 case QX86_REGISTER_DR6:
861 case QX86_REGISTER_DR7:
862 case QX86_REGISTER_DR8:
863 case QX86_REGISTER_DR9:
864 case QX86_REGISTER_DR10:
865 case QX86_REGISTER_DR11:
866 case QX86_REGISTER_DR12:
867 case QX86_REGISTER_DR13:
868 case QX86_REGISTER_DR14:
869 case QX86_REGISTER_DR15:
873 case QX86_REGISTER_XMM0:
874 case QX86_REGISTER_XMM1:
875 case QX86_REGISTER_XMM2:
876 case QX86_REGISTER_XMM3:
877 case QX86_REGISTER_XMM4:
878 case QX86_REGISTER_XMM5:
879 case QX86_REGISTER_XMM6:
880 case QX86_REGISTER_XMM7:
881 case QX86_REGISTER_XMM8:
882 case QX86_REGISTER_XMM9:
883 case QX86_REGISTER_XMM10:
884 case QX86_REGISTER_XMM11:
885 case QX86_REGISTER_XMM12:
886 case QX86_REGISTER_XMM13:
887 case QX86_REGISTER_XMM14:
888 case QX86_REGISTER_XMM15:
890 case QX86_REGISTER_YMM0:
891 case QX86_REGISTER_YMM1:
892 case QX86_REGISTER_YMM2:
893 case QX86_REGISTER_YMM3:
894 case QX86_REGISTER_YMM4:
895 case QX86_REGISTER_YMM5:
896 case QX86_REGISTER_YMM6:
897 case QX86_REGISTER_YMM7:
898 case QX86_REGISTER_YMM8:
899 case QX86_REGISTER_YMM9:
900 case QX86_REGISTER_YMM10:
901 case QX86_REGISTER_YMM11:
902 case QX86_REGISTER_YMM12:
903 case QX86_REGISTER_YMM13:
904 case QX86_REGISTER_YMM14:
905 case QX86_REGISTER_YMM15:
907 case QX86_REGISTER_MMX0:
908 case QX86_REGISTER_MMX1:
909 case QX86_REGISTER_MMX2:
910 case QX86_REGISTER_MMX3:
911 case QX86_REGISTER_MMX4:
912 case QX86_REGISTER_MMX5:
913 case QX86_REGISTER_MMX6:
914 case QX86_REGISTER_MMX7:
916 case QX86_REGISTER_ST0:
917 case QX86_REGISTER_ST1:
918 case QX86_REGISTER_ST2:
919 case QX86_REGISTER_ST3:
920 case QX86_REGISTER_ST4:
921 case QX86_REGISTER_ST5:
922 case QX86_REGISTER_ST6:
923 case QX86_REGISTER_ST7: