2 * This file is part of the Palacios Virtual Machine Monitor developed
3 * by the V3VEE Project with funding from the United States National
4 * Science Foundation and the Department of Energy.
6 * The V3VEE Project is a joint project between Northwestern University
7 * and the University of New Mexico. You can find out more at
10 * Copyright (c) 2012, Alexander Kudryavtsev <alexk@ispras.ru>
11 * Copyright (c) 2012, The V3VEE Project <http://www.v3vee.org>
12 * All rights reserved.
14 * Author: Alexander Kudryavtsev <alexk@ispras.ru>
16 * This is free software. You are permitted to use,
17 * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
20 #include <palacios/vmm.h>
21 #include <palacios/vm_guest.h>
22 #include <palacios/vmm_mem_hook.h>
23 #include <palacios/vmm_emulator.h>
24 #include <palacios/vm_guest_mem.h>
25 #include <palacios/vmm_hashtable.h>
26 #include <palacios/vmm_decoder.h>
28 #include <quix86/quix86.h>
30 #ifndef V3_CONFIG_DEBUG_DECODER
32 #define PrintDebug(fmt, args...)
35 #define GPR_REGISTER 0
36 #define SEGMENT_REGISTER 1
37 #define CTRL_REGISTER 2
38 #define DEBUG_REGISTER 3
40 // QUIX86 does not have to be initialised or deinitialised.
41 int v3_init_decoder(struct guest_info * core) {
44 int v3_deinit_decoder(struct guest_info * core) {
48 static int get_opcode(qx86_insn *inst, struct guest_info *core);
49 static int qx86_register_to_v3_reg(struct guest_info * info, int qx86_reg,
50 addr_t * v3_reg, uint_t * reg_len);
52 static int callback(void *data, int rindex, int subreg, unsigned char *value) {
56 struct guest_info *info = (struct guest_info*)data;
57 int v3_reg_type = qx86_register_to_v3_reg(info,
59 (addr_t*)®_addr, ®_size);
61 if(v3_reg_type == -1) {
62 PrintError(info->vm_info, info, "Callback failed to get register index %d\n", rindex);
66 *(uint64_t*)value = 0;
68 case QX86_SUBREG_BASE:
69 *(uint64_t*)value = ((struct v3_segment*)reg_addr)->base;
71 case QX86_SUBREG_LIMIT:
72 *(uint32_t*)value = ((struct v3_segment*)reg_addr)->limit;
74 case QX86_SUBREG_FLAGS:
75 PrintError(info->vm_info, info, "Callback doesn't know how to give flags.\n");
77 case QX86_SUBREG_NONE: {
78 switch(qx86_rinfo(rindex)->size) {
79 case 1: *(uint8_t* )value = *(uint8_t* )reg_addr; break;
80 case 2: *(uint16_t*)value = *(uint16_t*)reg_addr; break;
81 case 4: *(uint32_t*)value = *(uint32_t*)reg_addr; break;
82 case 8: *(uint64_t*)value = *(uint64_t*)reg_addr; break;
91 static inline int qx86_op_to_v3_op(struct guest_info *info, qx86_insn *qx86_insn,
92 int op_num, struct x86_operand * v3_op) {
94 qx86_operand *qx86_op = &qx86_insn->operands[op_num];
95 if (qx86_op->ot == QX86_OPERAND_TYPE_REGISTER) {
96 int v3_reg_type = qx86_register_to_v3_reg(info,
98 &(v3_op->operand), &(v3_op->size));
100 if (v3_reg_type == -1) {
101 PrintError(info->vm_info, info, "Operand %d is an Unhandled Operand: %s\n", op_num,
102 qx86_rinfo(qx86_op->u.r.rindex)->name);
103 v3_op->type = INVALID_OPERAND;
105 } else if (v3_reg_type == SEGMENT_REGISTER) {
106 struct v3_segment * seg_reg = (struct v3_segment *)(v3_op->operand);
107 v3_op->operand = (addr_t)&(seg_reg->selector);
109 v3_op->type = REG_OPERAND;
111 } else if(qx86_op->ot == QX86_OPERAND_TYPE_MEMORY) {
112 PrintDebug(info->vm_info, info, "Memory operand (%d)\n", op_num);
113 if((status = qx86_calculate_linear_address(qx86_insn, op_num,
114 (qx86_uint64*)&v3_op->operand)) != QX86_SUCCESS) {
115 PrintError(info->vm_info, info, "Could not get memory operand %d: "
116 "qx86_calculate_linear_address() returns %d\n", op_num, status);
119 v3_op->type = MEM_OPERAND;
120 v3_op->size = qx86_op->size;
122 } else if(qx86_op->ot == QX86_OPERAND_TYPE_IMMEDIATE) {
123 v3_op->size = qx86_op->u.i.valueSize;
125 if (v3_op->size > 4) {
126 PrintError(info->vm_info, info, "Unhandled 64 bit immediates\n");
129 v3_op->operand = (addr_t)*(uint64_t*)qx86_op->u.i.value;
130 v3_op->type = IMM_OPERAND;
133 PrintError(info->vm_info, info, "Unhandled Operand %d Type %d\n", op_num, qx86_op->ot);
137 if (qx86_op->attributes & QX86_OPERAND_ATTRIBUTE_READ) {
140 if (qx86_op->attributes & QX86_OPERAND_ATTRIBUTE_WRITTEN) {
146 int v3_decode(struct guest_info * info, addr_t instr_ptr, struct x86_instr * instr) {
149 uint8_t inst_buf[QX86_INSN_SIZE_MAX];
151 memset(instr, 0, sizeof(struct x86_instr));
152 memset(&qx86_inst, 0, sizeof(qx86_inst));
154 v3_get_prefixes((uchar_t *)instr_ptr, &(instr->prefixes));
156 switch(v3_get_vm_cpu_mode(info)) {
157 case REAL: case LONG_16_COMPAT:
158 proc_mode = QX86_SIZE_16; break;
159 case PROTECTED: case PROTECTED_PAE: case LONG_32_COMPAT:
160 proc_mode = QX86_SIZE_32; break;
162 proc_mode = QX86_SIZE_64; break;
164 PrintError(info->vm_info, info, "Unsupported CPU mode: %d\n", info->cpu_mode);
168 int left_in_page = 0x1000 - (instr_ptr & 0xfff);
169 if(left_in_page < QX86_INSN_SIZE_MAX) {
173 if (info->mem_mode == PHYSICAL_MEM) {
174 status = v3_gpa_to_hva(info, get_addr_linear(info,
175 (info->rip & ~0xfffULL) + 0x1000, &(info->segments.cs)), &instr_ptr2);
177 status = v3_gva_to_hva(info, get_addr_linear(info,
178 (info->rip & ~0xfffULL) + 0x1000, &(info->segments.cs)), &instr_ptr2);
181 PrintError(info->vm_info, info, "Could not translate Instruction Address at second stage "
182 "translation (%p)\n", (void *)(addr_t)info->rip);
186 if(((instr_ptr & ~0xfffUL) + 0x1000) != instr_ptr2) {
187 PrintError(info->vm_info, info, "Note: physical page non-contiguous\n");
188 memcpy(inst_buf, (const void*)instr_ptr, left_in_page);
189 memcpy(inst_buf + left_in_page, (const void*)instr_ptr2,
190 QX86_INSN_SIZE_MAX - left_in_page);
191 instr_ptr = (addr_t)inst_buf;
192 } // in other case, address space is contiguous and everything is OK
195 qx86_inst.callback = callback;
196 qx86_inst.data = info;
198 int status = qx86_decode(&qx86_inst, proc_mode,
199 (const void*)instr_ptr, QX86_INSN_SIZE_MAX);
200 if(status != QX86_SUCCESS) {
201 PrintError(info->vm_info, info, "qx86_decode() returned %d\n", status);
205 instr->instr_length = qx86_inst.rawSize;
207 if ((instr->op_type = get_opcode(&qx86_inst, info)) == V3_INVALID_OP) {
208 PrintError(info->vm_info, info, "Could not get opcode. (mnemonic=%s)\n",
209 qx86_minfo(qx86_inst.mnemonic)->name);
213 if(instr->op_type == V3_OP_MOVS || instr->op_type == V3_OP_STOS) {
214 instr->is_str_op = 1;
215 if (instr->prefixes.rep == 1) {
216 uint64_t a_mask = (~0ULL >>
217 (64 - QX86_SIZE_OCTETS(qx86_inst.attributes.addressSize) * 8));
219 instr->str_op_length = info->vm_regs.rcx & a_mask;
221 instr->str_op_length = 1;
224 instr->is_str_op = 0;
225 instr->str_op_length = 0;
228 instr->num_operands = qx86_inst.operandCount;
231 if (instr->num_operands >= 1) {
232 if (qx86_op_to_v3_op(info, &qx86_inst, 0, &instr->dst_operand) != 0)
236 // set second operand
237 if (instr->num_operands >= 2) {
238 if (qx86_op_to_v3_op(info, &qx86_inst, 1, &instr->src_operand) != 0)
243 if (instr->num_operands >= 3) {
244 if (qx86_op_to_v3_op(info, &qx86_inst, 2, &instr->third_operand) != 0)
248 #ifdef V3_CONFIG_DEBUG_DECODER
249 qx86_print_options_intel opt;
252 if(qx86_print_intel(&qx86_inst, &opt, buf, &buf_sz) != QX86_SUCCESS) {
253 PrintDebug(info->vm_info, info, "Print failed!\n");
255 PrintDebug(info->vm_info, info, "Instruction (%p): %s\n", (void*)info->rip, buf);
257 PrintDebug(info->vm_info, info, "Operands: dst %p src %p 3rd %p\n", (void*)instr->dst_operand.operand,
258 (void*)instr->src_operand.operand, (void*)instr->third_operand.operand);
263 static int get_opcode(qx86_insn *inst, struct guest_info *core) {
264 switch (inst->mnemonic) {
265 #define IS_CR(op) inst->operands[op].ot == QX86_OPERAND_TYPE_REGISTER && \
266 qx86_rinfo(inst->operands[op].u.r.rindex)->rclass == QX86_RCLASS_CREG
269 case QX86_MNEMONIC_MOV: {
270 if(inst->operands[0].ot == QX86_OPERAND_TYPE_MEMORY
271 || inst->operands[1].ot == QX86_OPERAND_TYPE_MEMORY)
278 PrintError(core->vm_info, core, "Bad operand types for MOV: %d %d\n", inst->operands[0].ot,
279 inst->operands[1].ot);
280 return V3_INVALID_OP;
283 /* Control Instructions */
284 case QX86_MNEMONIC_SMSW:
287 case QX86_MNEMONIC_LMSW:
290 case QX86_MNEMONIC_CLTS:
293 case QX86_MNEMONIC_INVLPG:
296 /* Data Instructions */
297 case QX86_MNEMONIC_ADC:
300 case QX86_MNEMONIC_ADD:
303 case QX86_MNEMONIC_AND:
306 case QX86_MNEMONIC_SUB:
310 case QX86_MNEMONIC_MOVZX:
313 case QX86_MNEMONIC_MOVSX:
317 case QX86_MNEMONIC_DEC:
320 case QX86_MNEMONIC_INC:
323 case QX86_MNEMONIC_OR:
326 case QX86_MNEMONIC_XOR:
329 case QX86_MNEMONIC_NEG:
332 case QX86_MNEMONIC_NOT:
335 case QX86_MNEMONIC_XCHG:
338 case QX86_MNEMONIC_SETB:
341 case QX86_MNEMONIC_SETBE:
344 case QX86_MNEMONIC_SETL:
347 case QX86_MNEMONIC_SETLE:
350 case QX86_MNEMONIC_SETAE:
353 case QX86_MNEMONIC_SETA:
356 case QX86_MNEMONIC_SETGE:
359 case QX86_MNEMONIC_SETG:
362 case QX86_MNEMONIC_SETNO:
365 case QX86_MNEMONIC_SETNP:
368 case QX86_MNEMONIC_SETNS:
371 case QX86_MNEMONIC_SETNZ:
374 case QX86_MNEMONIC_SETO:
377 case QX86_MNEMONIC_SETP:
380 case QX86_MNEMONIC_SETS:
383 case QX86_MNEMONIC_SETZ:
386 case QX86_MNEMONIC_MOVSB:
387 case QX86_MNEMONIC_MOVSW:
388 case QX86_MNEMONIC_MOVSD:
389 case QX86_MNEMONIC_MOVSQ:
392 case QX86_MNEMONIC_STOSB:
393 case QX86_MNEMONIC_STOSW:
394 case QX86_MNEMONIC_STOSD:
395 case QX86_MNEMONIC_STOSQ:
400 return V3_INVALID_OP;
404 static int qx86_register_to_v3_reg(struct guest_info * info, int qx86_reg,
405 addr_t * v3_reg, uint_t * reg_len) {
406 PrintDebug(info->vm_info, info, "qx86 Register: %s\n", qx86_rinfo(qx86_reg)->name);
409 case QX86_REGISTER_INVALID:
414 case QX86_REGISTER_RAX:
415 *v3_reg = (addr_t)&(info->vm_regs.rax);
418 case QX86_REGISTER_EAX:
419 *v3_reg = (addr_t)&(info->vm_regs.rax);
422 case QX86_REGISTER_AX:
423 *v3_reg = (addr_t)&(info->vm_regs.rax);
426 case QX86_REGISTER_AH:
427 *v3_reg = (addr_t)(&(info->vm_regs.rax)) + 1;
430 case QX86_REGISTER_AL:
431 *v3_reg = (addr_t)&(info->vm_regs.rax);
435 case QX86_REGISTER_RCX:
436 *v3_reg = (addr_t)&(info->vm_regs.rcx);
439 case QX86_REGISTER_ECX:
440 *v3_reg = (addr_t)&(info->vm_regs.rcx);
443 case QX86_REGISTER_CX:
444 *v3_reg = (addr_t)&(info->vm_regs.rcx);
447 case QX86_REGISTER_CH:
448 *v3_reg = (addr_t)(&(info->vm_regs.rcx)) + 1;
451 case QX86_REGISTER_CL:
452 *v3_reg = (addr_t)&(info->vm_regs.rcx);
456 case QX86_REGISTER_RDX:
457 *v3_reg = (addr_t)&(info->vm_regs.rdx);
460 case QX86_REGISTER_EDX:
461 *v3_reg = (addr_t)&(info->vm_regs.rdx);
464 case QX86_REGISTER_DX:
465 *v3_reg = (addr_t)&(info->vm_regs.rdx);
468 case QX86_REGISTER_DH:
469 *v3_reg = (addr_t)(&(info->vm_regs.rdx)) + 1;
472 case QX86_REGISTER_DL:
473 *v3_reg = (addr_t)&(info->vm_regs.rdx);
477 case QX86_REGISTER_RBX:
478 *v3_reg = (addr_t)&(info->vm_regs.rbx);
481 case QX86_REGISTER_EBX:
482 *v3_reg = (addr_t)&(info->vm_regs.rbx);
485 case QX86_REGISTER_BX:
486 *v3_reg = (addr_t)&(info->vm_regs.rbx);
489 case QX86_REGISTER_BH:
490 *v3_reg = (addr_t)(&(info->vm_regs.rbx)) + 1;
493 case QX86_REGISTER_BL:
494 *v3_reg = (addr_t)&(info->vm_regs.rbx);
499 case QX86_REGISTER_RSP:
500 *v3_reg = (addr_t)&(info->vm_regs.rsp);
503 case QX86_REGISTER_ESP:
504 *v3_reg = (addr_t)&(info->vm_regs.rsp);
507 case QX86_REGISTER_SP:
508 *v3_reg = (addr_t)&(info->vm_regs.rsp);
511 case QX86_REGISTER_SPL:
512 *v3_reg = (addr_t)&(info->vm_regs.rsp);
516 case QX86_REGISTER_RBP:
517 *v3_reg = (addr_t)&(info->vm_regs.rbp);
520 case QX86_REGISTER_EBP:
521 *v3_reg = (addr_t)&(info->vm_regs.rbp);
524 case QX86_REGISTER_BP:
525 *v3_reg = (addr_t)&(info->vm_regs.rbp);
528 case QX86_REGISTER_BPL:
529 *v3_reg = (addr_t)&(info->vm_regs.rbp);
535 case QX86_REGISTER_RSI:
536 *v3_reg = (addr_t)&(info->vm_regs.rsi);
539 case QX86_REGISTER_ESI:
540 *v3_reg = (addr_t)&(info->vm_regs.rsi);
543 case QX86_REGISTER_SI:
544 *v3_reg = (addr_t)&(info->vm_regs.rsi);
547 case QX86_REGISTER_SIL:
548 *v3_reg = (addr_t)&(info->vm_regs.rsi);
553 case QX86_REGISTER_RDI:
554 *v3_reg = (addr_t)&(info->vm_regs.rdi);
557 case QX86_REGISTER_EDI:
558 *v3_reg = (addr_t)&(info->vm_regs.rdi);
561 case QX86_REGISTER_DI:
562 *v3_reg = (addr_t)&(info->vm_regs.rdi);
565 case QX86_REGISTER_DIL:
566 *v3_reg = (addr_t)&(info->vm_regs.rdi);
574 case QX86_REGISTER_R8:
575 *v3_reg = (addr_t)&(info->vm_regs.r8);
578 case QX86_REGISTER_R8D:
579 *v3_reg = (addr_t)&(info->vm_regs.r8);
582 case QX86_REGISTER_R8W:
583 *v3_reg = (addr_t)&(info->vm_regs.r8);
586 case QX86_REGISTER_R8B:
587 *v3_reg = (addr_t)&(info->vm_regs.r8);
591 case QX86_REGISTER_R9:
592 *v3_reg = (addr_t)&(info->vm_regs.r9);
595 case QX86_REGISTER_R9D:
596 *v3_reg = (addr_t)&(info->vm_regs.r9);
599 case QX86_REGISTER_R9W:
600 *v3_reg = (addr_t)&(info->vm_regs.r9);
603 case QX86_REGISTER_R9B:
604 *v3_reg = (addr_t)&(info->vm_regs.r9);
608 case QX86_REGISTER_R10:
609 *v3_reg = (addr_t)&(info->vm_regs.r10);
612 case QX86_REGISTER_R10D:
613 *v3_reg = (addr_t)&(info->vm_regs.r10);
616 case QX86_REGISTER_R10W:
617 *v3_reg = (addr_t)&(info->vm_regs.r10);
620 case QX86_REGISTER_R10B:
621 *v3_reg = (addr_t)&(info->vm_regs.r10);
625 case QX86_REGISTER_R11:
626 *v3_reg = (addr_t)&(info->vm_regs.r11);
629 case QX86_REGISTER_R11D:
630 *v3_reg = (addr_t)&(info->vm_regs.r11);
633 case QX86_REGISTER_R11W:
634 *v3_reg = (addr_t)&(info->vm_regs.r11);
637 case QX86_REGISTER_R11B:
638 *v3_reg = (addr_t)&(info->vm_regs.r11);
642 case QX86_REGISTER_R12:
643 *v3_reg = (addr_t)&(info->vm_regs.r12);
646 case QX86_REGISTER_R12D:
647 *v3_reg = (addr_t)&(info->vm_regs.r12);
650 case QX86_REGISTER_R12W:
651 *v3_reg = (addr_t)&(info->vm_regs.r12);
654 case QX86_REGISTER_R12B:
655 *v3_reg = (addr_t)&(info->vm_regs.r12);
659 case QX86_REGISTER_R13:
660 *v3_reg = (addr_t)&(info->vm_regs.r13);
663 case QX86_REGISTER_R13D:
664 *v3_reg = (addr_t)&(info->vm_regs.r13);
667 case QX86_REGISTER_R13W:
668 *v3_reg = (addr_t)&(info->vm_regs.r13);
671 case QX86_REGISTER_R13B:
672 *v3_reg = (addr_t)&(info->vm_regs.r13);
676 case QX86_REGISTER_R14:
677 *v3_reg = (addr_t)&(info->vm_regs.r14);
680 case QX86_REGISTER_R14D:
681 *v3_reg = (addr_t)&(info->vm_regs.r14);
684 case QX86_REGISTER_R14W:
685 *v3_reg = (addr_t)&(info->vm_regs.r14);
688 case QX86_REGISTER_R14B:
689 *v3_reg = (addr_t)&(info->vm_regs.r14);
693 case QX86_REGISTER_R15:
694 *v3_reg = (addr_t)&(info->vm_regs.r15);
697 case QX86_REGISTER_R15D:
698 *v3_reg = (addr_t)&(info->vm_regs.r15);
701 case QX86_REGISTER_R15W:
702 *v3_reg = (addr_t)&(info->vm_regs.r15);
705 case QX86_REGISTER_R15B:
706 *v3_reg = (addr_t)&(info->vm_regs.r15);
711 case QX86_REGISTER_RIP:
712 *v3_reg = (addr_t)&(info->rip);
714 return CTRL_REGISTER;
715 case QX86_REGISTER_EIP:
716 *v3_reg = (addr_t)&(info->rip);
718 return CTRL_REGISTER;
719 case QX86_REGISTER_IP:
720 *v3_reg = (addr_t)&(info->rip);
722 return CTRL_REGISTER;
724 case QX86_REGISTER_FLAGS:
725 *v3_reg = (addr_t)&(info->ctrl_regs.rflags);
727 return CTRL_REGISTER;
728 case QX86_REGISTER_EFLAGS:
729 *v3_reg = (addr_t)&(info->ctrl_regs.rflags);
731 return CTRL_REGISTER;
732 case QX86_REGISTER_RFLAGS:
733 *v3_reg = (addr_t)&(info->ctrl_regs.rflags);
735 return CTRL_REGISTER;
737 case QX86_REGISTER_CR0:
738 *v3_reg = (addr_t)&(info->ctrl_regs.cr0);
740 return CTRL_REGISTER;
741 case QX86_REGISTER_CR2:
742 *v3_reg = (addr_t)&(info->ctrl_regs.cr2);
744 return CTRL_REGISTER;
745 case QX86_REGISTER_CR3:
746 *v3_reg = (addr_t)&(info->ctrl_regs.cr3);
748 return CTRL_REGISTER;
749 case QX86_REGISTER_CR4:
750 *v3_reg = (addr_t)&(info->ctrl_regs.cr4);
752 return CTRL_REGISTER;
753 case QX86_REGISTER_CR8:
754 *v3_reg = (addr_t)&(info->ctrl_regs.apic_tpr);
756 return CTRL_REGISTER;
758 case QX86_REGISTER_CR1:
759 case QX86_REGISTER_CR5:
760 case QX86_REGISTER_CR6:
761 case QX86_REGISTER_CR7:
762 case QX86_REGISTER_CR9:
763 case QX86_REGISTER_CR10:
764 case QX86_REGISTER_CR11:
765 case QX86_REGISTER_CR12:
766 case QX86_REGISTER_CR13:
767 case QX86_REGISTER_CR14:
768 case QX86_REGISTER_CR15:
772 case QX86_REGISTER_CS:
773 *v3_reg = (addr_t)&(info->segments.cs);
775 return SEGMENT_REGISTER;
776 case QX86_REGISTER_DS:
777 *v3_reg = (addr_t)&(info->segments.ds);
779 return SEGMENT_REGISTER;
780 case QX86_REGISTER_ES:
781 *v3_reg = (addr_t)&(info->segments.es);
783 return SEGMENT_REGISTER;
784 case QX86_REGISTER_SS:
785 *v3_reg = (addr_t)&(info->segments.ss);
787 return SEGMENT_REGISTER;
788 case QX86_REGISTER_FS:
789 *v3_reg = (addr_t)&(info->segments.fs);
791 return SEGMENT_REGISTER;
792 case QX86_REGISTER_GS:
793 *v3_reg = (addr_t)&(info->segments.gs);
795 return SEGMENT_REGISTER;
798 case QX86_REGISTER_DR0:
799 case QX86_REGISTER_DR1:
800 case QX86_REGISTER_DR2:
801 case QX86_REGISTER_DR3:
802 case QX86_REGISTER_DR4:
803 case QX86_REGISTER_DR5:
804 case QX86_REGISTER_DR6:
805 case QX86_REGISTER_DR7:
806 case QX86_REGISTER_DR8:
807 case QX86_REGISTER_DR9:
808 case QX86_REGISTER_DR10:
809 case QX86_REGISTER_DR11:
810 case QX86_REGISTER_DR12:
811 case QX86_REGISTER_DR13:
812 case QX86_REGISTER_DR14:
813 case QX86_REGISTER_DR15:
817 case QX86_REGISTER_XMM0:
818 case QX86_REGISTER_XMM1:
819 case QX86_REGISTER_XMM2:
820 case QX86_REGISTER_XMM3:
821 case QX86_REGISTER_XMM4:
822 case QX86_REGISTER_XMM5:
823 case QX86_REGISTER_XMM6:
824 case QX86_REGISTER_XMM7:
825 case QX86_REGISTER_XMM8:
826 case QX86_REGISTER_XMM9:
827 case QX86_REGISTER_XMM10:
828 case QX86_REGISTER_XMM11:
829 case QX86_REGISTER_XMM12:
830 case QX86_REGISTER_XMM13:
831 case QX86_REGISTER_XMM14:
832 case QX86_REGISTER_XMM15:
834 case QX86_REGISTER_YMM0:
835 case QX86_REGISTER_YMM1:
836 case QX86_REGISTER_YMM2:
837 case QX86_REGISTER_YMM3:
838 case QX86_REGISTER_YMM4:
839 case QX86_REGISTER_YMM5:
840 case QX86_REGISTER_YMM6:
841 case QX86_REGISTER_YMM7:
842 case QX86_REGISTER_YMM8:
843 case QX86_REGISTER_YMM9:
844 case QX86_REGISTER_YMM10:
845 case QX86_REGISTER_YMM11:
846 case QX86_REGISTER_YMM12:
847 case QX86_REGISTER_YMM13:
848 case QX86_REGISTER_YMM14:
849 case QX86_REGISTER_YMM15:
851 case QX86_REGISTER_MMX0:
852 case QX86_REGISTER_MMX1:
853 case QX86_REGISTER_MMX2:
854 case QX86_REGISTER_MMX3:
855 case QX86_REGISTER_MMX4:
856 case QX86_REGISTER_MMX5:
857 case QX86_REGISTER_MMX6:
858 case QX86_REGISTER_MMX7:
860 case QX86_REGISTER_ST0:
861 case QX86_REGISTER_ST1:
862 case QX86_REGISTER_ST2:
863 case QX86_REGISTER_ST3:
864 case QX86_REGISTER_ST4:
865 case QX86_REGISTER_ST5:
866 case QX86_REGISTER_ST6:
867 case QX86_REGISTER_ST7: