2 * This file is part of the Palacios Virtual Machine Monitor developed
3 * by the V3VEE Project with funding from the United States National
4 * Science Foundation and the Department of Energy.
6 * The V3VEE Project is a joint project between Northwestern University
7 * and the University of New Mexico. You can find out more at
10 * Copyright (c) 2008, Jack Lange <jarusl@cs.northwestern.edu>
11 * Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org>
12 * All rights reserved.
14 * Author: Jack Lange <jarusl@cs.northwestern.edu>
16 * This is free software. You are permitted to use,
17 * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
20 #include <palacios/vmm_mem.h>
21 #include <palacios/vmm.h>
22 #include <palacios/vmcb.h>
23 #include <palacios/vmm_decoder.h>
24 #include <palacios/vm_guest_mem.h>
25 #include <palacios/vmm_ctrl_regs.h>
26 #include <palacios/vmm_direct_paging.h>
28 #ifndef DEBUG_CTRL_REGS
30 #define PrintDebug(fmt, args...)
34 static int handle_lmsw(struct guest_info * info, struct x86_instr * dec_instr);
35 static int handle_clts(struct guest_info * info, struct x86_instr * dec_instr);
36 static int handle_mov_to_cr0(struct guest_info * info, struct x86_instr * dec_instr);
39 // First Attempt = 494 lines
40 // current = 106 lines
41 int v3_handle_cr0_write(struct guest_info * info) {
44 struct x86_instr dec_instr;
46 if (info->mem_mode == PHYSICAL_MEM) {
47 ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
49 ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
52 if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
53 PrintError("Could not decode instruction\n");
58 if (dec_instr.op_type == V3_OP_LMSW) {
59 if (handle_lmsw(info, &dec_instr) == -1) {
62 } else if (dec_instr.op_type == V3_OP_MOV2CR) {
63 if (handle_mov_to_cr0(info, &dec_instr) == -1) {
66 } else if (dec_instr.op_type == V3_OP_CLTS) {
67 if (handle_clts(info, &dec_instr) == -1) {
71 PrintError("Unhandled opcode in handle_cr0_write\n");
75 info->rip += dec_instr.instr_length;
83 // The CR0 register only has flags in the low 32 bits
84 // The hardware does a format check to make sure the high bits are zero
85 // Because of this we can ignore the high 32 bits here
86 static int handle_mov_to_cr0(struct guest_info * info, struct x86_instr * dec_instr) {
88 struct cr0_32 * shadow_cr0 = (struct cr0_32 *)&(info->ctrl_regs.cr0);
89 struct cr0_32 * new_cr0 = (struct cr0_32 *)(dec_instr->src_operand.operand);
90 struct cr0_32 * guest_cr0 = (struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
91 uint_t paging_transition = 0;
93 PrintDebug("MOV2CR0 (MODE=%s)\n", v3_cpu_mode_to_str(info->cpu_mode));
95 PrintDebug("OperandVal = %x, length=%d\n", *(uint_t *)new_cr0, dec_instr->src_operand.size);
97 PrintDebug("Old CR0=%x\n", *(uint_t *)shadow_cr0);
98 PrintDebug("Old Guest CR0=%x\n", *(uint_t *)guest_cr0);
101 // We detect if this is a paging transition
102 if (guest_cr0->pg != new_cr0->pg) {
103 paging_transition = 1;
106 // Guest always sees the value they wrote
107 *guest_cr0 = *new_cr0;
109 // This value must always be set to 1
112 // Set the shadow register to catch non-virtualized flags
113 *shadow_cr0 = *guest_cr0;
115 // Paging is always enabled
118 // Was there a paging transition
119 // Meaning we need to change the page tables
120 if (paging_transition) {
121 if (v3_get_vm_mem_mode(info) == VIRTUAL_MEM) {
123 struct efer_64 * guest_efer = (struct efer_64 *)&(info->guest_efer);
124 struct efer_64 * shadow_efer = (struct efer_64 *)&(info->ctrl_regs.efer);
126 // Check long mode LME to set LME
127 if (guest_efer->lme == 1) {
128 PrintDebug("Enabing Long Mode\n");
131 shadow_efer->lma = 1;
132 shadow_efer->lme = 1;
134 PrintDebug("New EFER %p\n", (void *)*(addr_t *)(shadow_efer));
137 PrintDebug("Activating Shadow Page Tables\n");
139 if (v3_activate_shadow_pt(info) == -1) {
140 PrintError("Failed to activate shadow page tables\n");
145 if (v3_activate_passthrough_pt(info) == -1) {
146 PrintError("Failed to activate passthrough page tables\n");
153 PrintDebug("New Guest CR0=%x\n",*(uint_t *)guest_cr0);
154 PrintDebug("New CR0=%x\n", *(uint_t *)shadow_cr0);
162 static int handle_clts(struct guest_info * info, struct x86_instr * dec_instr) {
164 struct cr0_32 * real_cr0 = (struct cr0_32*)&(info->ctrl_regs.cr0);
168 if (info->shdw_pg_mode == SHADOW_PAGING) {
169 struct cr0_32 * guest_cr0 = (struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
176 static int handle_lmsw(struct guest_info * info, struct x86_instr * dec_instr) {
177 struct cr0_real * real_cr0 = (struct cr0_real *)&(info->ctrl_regs.cr0);
178 // XED is a mess, and basically reverses the operand order for an LMSW
179 struct cr0_real * new_cr0 = (struct cr0_real *)(dec_instr->dst_operand.operand);
182 PrintDebug("LMSW\n");
184 new_cr0_val = (*(char*)(new_cr0)) & 0x0f;
186 PrintDebug("OperandVal = %x\n", new_cr0_val);
188 // We can just copy the new value through
189 // we don't need to virtualize the lower 4 bits
190 PrintDebug("Old CR0=%x\n", *(uint_t *)real_cr0);
191 *(uchar_t*)real_cr0 &= 0xf0;
192 *(uchar_t*)real_cr0 |= new_cr0_val;
193 PrintDebug("New CR0=%x\n", *(uint_t *)real_cr0);
196 // If Shadow paging is enabled we push the changes to the virtualized copy of cr0
197 if (info->shdw_pg_mode == SHADOW_PAGING) {
198 struct cr0_real * guest_cr0 = (struct cr0_real*)&(info->shdw_pg_state.guest_cr0);
200 PrintDebug("Old Guest CR0=%x\n", *(uint_t *)guest_cr0);
201 *(uchar_t*)guest_cr0 &= 0xf0;
202 *(uchar_t*)guest_cr0 |= new_cr0_val;
203 PrintDebug("New Guest CR0=%x\n", *(uint_t *)guest_cr0);
212 // First attempt = 253 lines
213 // current = 51 lines
214 int v3_handle_cr0_read(struct guest_info * info) {
217 struct x86_instr dec_instr;
219 if (info->mem_mode == PHYSICAL_MEM) {
220 ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
222 ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
226 if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
227 PrintError("Could not decode instruction\n");
231 if (dec_instr.op_type == V3_OP_MOVCR2) {
232 PrintDebug("MOVCR2 (mode=%s)\n", v3_cpu_mode_to_str(info->cpu_mode));
234 if ((v3_get_vm_cpu_mode(info) == LONG) ||
235 (v3_get_vm_cpu_mode(info) == LONG_32_COMPAT)) {
236 struct cr0_64 * dst_reg = (struct cr0_64 *)(dec_instr.dst_operand.operand);
238 if (info->shdw_pg_mode == SHADOW_PAGING) {
239 struct cr0_64 * guest_cr0 = (struct cr0_64 *)&(info->shdw_pg_state.guest_cr0);
240 *dst_reg = *guest_cr0;
242 struct cr0_64 * shadow_cr0 = (struct cr0_64 *)&(info->ctrl_regs.cr0);
243 *dst_reg = *shadow_cr0;
246 PrintDebug("returned CR0: %p\n", (void *)*(addr_t *)dst_reg);
248 struct cr0_32 * dst_reg = (struct cr0_32 *)(dec_instr.dst_operand.operand);
250 if (info->shdw_pg_mode == SHADOW_PAGING) {
251 struct cr0_32 * guest_cr0 = (struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
252 *dst_reg = *guest_cr0;
254 struct cr0_32 * shadow_cr0 = (struct cr0_32 *)&(info->ctrl_regs.cr0);
255 *dst_reg = *shadow_cr0;
258 PrintDebug("returned CR0: %x\n", *(uint_t*)dst_reg);
261 } else if (dec_instr.op_type == V3_OP_SMSW) {
262 struct cr0_real * shadow_cr0 = (struct cr0_real *)&(info->ctrl_regs.cr0);
263 struct cr0_real * dst_reg = (struct cr0_real *)(dec_instr.dst_operand.operand);
264 char cr0_val = *(char*)shadow_cr0 & 0x0f;
266 PrintDebug("SMSW\n");
268 // The lower 4 bits of the guest/shadow CR0 are mapped through
269 // We can treat nested and shadow paging the same here
270 *(char *)dst_reg &= 0xf0;
271 *(char *)dst_reg |= cr0_val;
274 PrintError("Unhandled opcode in handle_cr0_read\n");
278 info->rip += dec_instr.instr_length;
286 // First Attempt = 256 lines
287 // current = 65 lines
288 int v3_handle_cr3_write(struct guest_info * info) {
291 struct x86_instr dec_instr;
293 if (info->mem_mode == PHYSICAL_MEM) {
294 ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
296 ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
299 if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
300 PrintError("Could not decode instruction\n");
304 if (dec_instr.op_type == V3_OP_MOV2CR) {
305 PrintDebug("MOV2CR3 (cpu_mode=%s)\n", v3_cpu_mode_to_str(info->cpu_mode));
307 if (info->shdw_pg_mode == SHADOW_PAGING) {
308 PrintDebug("Old Shadow CR3=%p; Old Guest CR3=%p\n",
309 (void *)(addr_t)(info->ctrl_regs.cr3),
310 (void*)(addr_t)(info->shdw_pg_state.guest_cr3));
313 // We update the guest CR3
314 if (info->cpu_mode == LONG) {
315 struct cr3_64 * new_cr3 = (struct cr3_64 *)(dec_instr.src_operand.operand);
316 struct cr3_64 * guest_cr3 = (struct cr3_64 *)&(info->shdw_pg_state.guest_cr3);
317 *guest_cr3 = *new_cr3;
319 struct cr3_32 * new_cr3 = (struct cr3_32 *)(dec_instr.src_operand.operand);
320 struct cr3_32 * guest_cr3 = (struct cr3_32 *)&(info->shdw_pg_state.guest_cr3);
321 *guest_cr3 = *new_cr3;
324 // If Paging is enabled in the guest then we need to change the shadow page tables
325 if (info->mem_mode == VIRTUAL_MEM) {
326 if (v3_activate_shadow_pt(info) == -1) {
327 PrintError("Failed to activate 32 bit shadow page table\n");
332 PrintDebug("New Shadow CR3=%p; New Guest CR3=%p\n",
333 (void *)(addr_t)(info->ctrl_regs.cr3),
334 (void*)(addr_t)(info->shdw_pg_state.guest_cr3));
336 } else if (info->shdw_pg_mode == NESTED_PAGING) {
338 // This is just a passthrough operation which we probably don't need here
339 if (info->cpu_mode == LONG) {
340 struct cr3_64 * new_cr3 = (struct cr3_64 *)(dec_instr.src_operand.operand);
341 struct cr3_64 * guest_cr3 = (struct cr3_64 *)&(info->ctrl_regs.cr3);
342 *guest_cr3 = *new_cr3;
344 struct cr3_32 * new_cr3 = (struct cr3_32 *)(dec_instr.src_operand.operand);
345 struct cr3_32 * guest_cr3 = (struct cr3_32 *)&(info->ctrl_regs.cr3);
346 *guest_cr3 = *new_cr3;
351 PrintError("Unhandled opcode in handle_cr3_write\n");
355 info->rip += dec_instr.instr_length;
362 // first attempt = 156 lines
363 // current = 36 lines
364 int v3_handle_cr3_read(struct guest_info * info) {
367 struct x86_instr dec_instr;
369 if (info->mem_mode == PHYSICAL_MEM) {
370 ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
372 ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
375 if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
376 PrintError("Could not decode instruction\n");
380 if (dec_instr.op_type == V3_OP_MOVCR2) {
381 PrintDebug("MOVCR32 (mode=%s)\n", v3_cpu_mode_to_str(info->cpu_mode));
383 if (info->shdw_pg_mode == SHADOW_PAGING) {
385 if ((v3_get_vm_cpu_mode(info) == LONG) ||
386 (v3_get_vm_cpu_mode(info) == LONG_32_COMPAT)) {
387 struct cr3_64 * dst_reg = (struct cr3_64 *)(dec_instr.dst_operand.operand);
388 struct cr3_64 * guest_cr3 = (struct cr3_64 *)&(info->shdw_pg_state.guest_cr3);
389 *dst_reg = *guest_cr3;
391 struct cr3_32 * dst_reg = (struct cr3_32 *)(dec_instr.dst_operand.operand);
392 struct cr3_32 * guest_cr3 = (struct cr3_32 *)&(info->shdw_pg_state.guest_cr3);
393 *dst_reg = *guest_cr3;
396 } else if (info->shdw_pg_mode == NESTED_PAGING) {
398 // This is just a passthrough operation which we probably don't need here
399 if ((v3_get_vm_cpu_mode(info) == LONG) ||
400 (v3_get_vm_cpu_mode(info) == LONG_32_COMPAT)) {
401 struct cr3_64 * dst_reg = (struct cr3_64 *)(dec_instr.dst_operand.operand);
402 struct cr3_64 * guest_cr3 = (struct cr3_64 *)&(info->ctrl_regs.cr3);
403 *dst_reg = *guest_cr3;
405 struct cr3_32 * dst_reg = (struct cr3_32 *)(dec_instr.dst_operand.operand);
406 struct cr3_32 * guest_cr3 = (struct cr3_32 *)&(info->ctrl_regs.cr3);
407 *dst_reg = *guest_cr3;
412 PrintError("Unhandled opcode in handle_cr3_read\n");
416 info->rip += dec_instr.instr_length;
422 // We don't need to virtualize CR4, all we need is to detect the activation of PAE
423 int v3_handle_cr4_read(struct guest_info * info) {
424 // PrintError("CR4 Read not handled\n");
429 int v3_handle_cr4_write(struct guest_info * info) {
433 struct x86_instr dec_instr;
434 v3_cpu_mode_t cpu_mode = v3_get_vm_cpu_mode(info);
436 if (info->mem_mode == PHYSICAL_MEM) {
437 ret = read_guest_pa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
439 ret = read_guest_va_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
442 if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
443 PrintError("Could not decode instruction\n");
447 if (dec_instr.op_type != V3_OP_MOV2CR) {
448 PrintError("Invalid opcode in write to CR4\n");
452 // Check to see if we need to flush the tlb
454 if (v3_get_vm_mem_mode(info) == VIRTUAL_MEM) {
455 struct cr4_32 * new_cr4 = (struct cr4_32 *)(dec_instr.src_operand.operand);
456 struct cr4_32 * cr4 = (struct cr4_32 *)&(info->ctrl_regs.cr4);
458 // if pse, pge, or pae have changed while PG (in any mode) is on
459 // the side effect is a TLB flush, which means we need to
460 // toss the current shadow page tables too
463 // TODO - PAE FLAG needs to be special cased
464 if ((cr4->pse != new_cr4->pse) ||
465 (cr4->pge != new_cr4->pge) ||
466 (cr4->pae != new_cr4->pae)) {
467 PrintDebug("Handling PSE/PGE/PAE -> TLBFlush case, flag set\n");
474 if ((cpu_mode == PROTECTED) || (cpu_mode == PROTECTED_PAE)) {
475 struct cr4_32 * new_cr4 = (struct cr4_32 *)(dec_instr.src_operand.operand);
476 struct cr4_32 * cr4 = (struct cr4_32 *)&(info->ctrl_regs.cr4);
478 PrintDebug("OperandVal = %x, length = %d\n", *(uint_t *)new_cr4, dec_instr.src_operand.size);
479 PrintDebug("Old CR4=%x\n", *(uint_t *)cr4);
481 if ((info->shdw_pg_mode == SHADOW_PAGING)) {
482 if (v3_get_vm_mem_mode(info) == PHYSICAL_MEM) {
484 if ((cr4->pae == 0) && (new_cr4->pae == 1)) {
485 PrintDebug("Creating PAE passthrough tables\n");
487 // create 32 bit PAE direct map page table
488 if (v3_reset_passthrough_pts(info) == -1) {
489 PrintError("Could not create 32 bit PAE passthrough pages tables\n");
493 // reset cr3 to new page tables
494 info->ctrl_regs.cr3 = *(addr_t*)&(info->direct_map_pt);
496 } else if ((cr4->pae == 1) && (new_cr4->pae == 0)) {
497 // Create passthrough standard 32bit pagetables
498 PrintError("Switching From PAE to Protected mode not supported\n");
505 PrintDebug("New CR4=%x\n", *(uint_t *)cr4);
507 } else if ((cpu_mode == LONG) || (cpu_mode == LONG_32_COMPAT)) {
508 struct cr4_64 * new_cr4 = (struct cr4_64 *)(dec_instr.src_operand.operand);
509 struct cr4_64 * cr4 = (struct cr4_64 *)&(info->ctrl_regs.cr4);
511 PrintDebug("Old CR4=%p\n", (void *)*(addr_t *)cr4);
512 PrintDebug("New CR4=%p\n", (void *)*(addr_t *)new_cr4);
514 if (new_cr4->pae == 0) {
515 // cannot turn off PAE in long mode GPF the guest
516 PrintError("Cannot disable PAE in long mode, should send GPF\n");
523 PrintError("CR4 write not supported in CPU_MODE: %s\n", v3_cpu_mode_to_str(cpu_mode));
529 PrintDebug("Handling PSE/PGE/PAE -> TLBFlush (doing flush now!)\n");
530 if (v3_activate_shadow_pt(info) == -1) {
531 PrintError("Failed to activate shadow page tables when emulating TLB flush in handling cr4 write\n");
537 info->rip += dec_instr.instr_length;
542 int v3_handle_efer_read(uint_t msr, struct v3_msr * dst, void * priv_data) {
543 struct guest_info * info = (struct guest_info *)(priv_data);
544 PrintDebug("EFER Read HI=%x LO=%x\n", info->guest_efer.hi, info->guest_efer.lo);
546 dst->value = info->guest_efer.value;
548 info->rip += 2; // WRMSR/RDMSR are two byte operands
554 // TODO: this is a disaster we need to clean this up...
555 int v3_handle_efer_write(uint_t msr, struct v3_msr src, void * priv_data) {
556 struct guest_info * info = (struct guest_info *)(priv_data);
557 //struct efer_64 * new_efer = (struct efer_64 *)&(src.value);
558 struct efer_64 * shadow_efer = (struct efer_64 *)&(info->ctrl_regs.efer);
559 struct v3_msr * guest_efer = &(info->guest_efer);
561 PrintDebug("EFER Write\n");
562 PrintDebug("EFER Write Values: HI=%x LO=%x\n", src.hi, src.lo);
563 //PrintDebug("Old EFER=%p\n", (void *)*(addr_t*)(shadow_efer));
565 // We virtualize the guests efer to hide the SVME and LMA bits
566 guest_efer->value = src.value;
569 // Enable/Disable Syscall
570 shadow_efer->sce = src.value & 0x1;
572 info->rip += 2; // WRMSR/RDMSR are two byte operands