2 * This file is part of the Palacios Virtual Machine Monitor developed
3 * by the V3VEE Project with funding from the United States National
4 * Science Foundation and the Department of Energy.
6 * The V3VEE Project is a joint project between Northwestern University
7 * and the University of New Mexico. You can find out more at
10 * Copyright (c) 2008, Jack Lange <jarusl@cs.northwestern.edu>
11 * Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org>
12 * All rights reserved.
14 * Author: Jack Lange <jarusl@cs.northwestern.edu>
16 * This is free software. You are permitted to use,
17 * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
20 #include <palacios/vmm_mem.h>
21 #include <palacios/vmm.h>
22 #include <palacios/vmcb.h>
23 #include <palacios/vmm_decoder.h>
24 #include <palacios/vm_guest_mem.h>
25 #include <palacios/vmm_ctrl_regs.h>
26 #include <palacios/vmm_direct_paging.h>
28 #ifndef CONFIG_DEBUG_CTRL_REGS
30 #define PrintDebug(fmt, args...)
34 static int handle_lmsw(struct guest_info * info, struct x86_instr * dec_instr);
35 static int handle_clts(struct guest_info * info, struct x86_instr * dec_instr);
36 static int handle_mov_to_cr0(struct guest_info * info, struct x86_instr * dec_instr);
39 // First Attempt = 494 lines
40 // current = 106 lines
41 int v3_handle_cr0_write(struct guest_info * info) {
44 struct x86_instr dec_instr;
46 if (info->mem_mode == PHYSICAL_MEM) {
47 ret = v3_read_gpa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
49 ret = v3_read_gva_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
52 if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
53 PrintError("Could not decode instruction\n");
58 if (dec_instr.op_type == V3_OP_LMSW) {
59 if (handle_lmsw(info, &dec_instr) == -1) {
62 } else if (dec_instr.op_type == V3_OP_MOV2CR) {
63 if (handle_mov_to_cr0(info, &dec_instr) == -1) {
66 } else if (dec_instr.op_type == V3_OP_CLTS) {
67 if (handle_clts(info, &dec_instr) == -1) {
71 PrintError("Unhandled opcode in handle_cr0_write\n");
75 info->rip += dec_instr.instr_length;
83 // The CR0 register only has flags in the low 32 bits
84 // The hardware does a format check to make sure the high bits are zero
85 // Because of this we can ignore the high 32 bits here
86 static int handle_mov_to_cr0(struct guest_info * info, struct x86_instr * dec_instr) {
88 struct cr0_32 * shadow_cr0 = (struct cr0_32 *)&(info->ctrl_regs.cr0);
89 struct cr0_32 * new_cr0 = (struct cr0_32 *)(dec_instr->src_operand.operand);
90 struct cr0_32 * guest_cr0 = (struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
91 uint_t paging_transition = 0;
93 PrintDebug("MOV2CR0 (MODE=%s)\n", v3_cpu_mode_to_str(info->cpu_mode));
95 PrintDebug("OperandVal = %x, length=%d\n", *(uint_t *)new_cr0, dec_instr->src_operand.size);
97 PrintDebug("Old CR0=%x\n", *(uint_t *)shadow_cr0);
98 PrintDebug("Old Guest CR0=%x\n", *(uint_t *)guest_cr0);
101 // We detect if this is a paging transition
102 if (guest_cr0->pg != new_cr0->pg) {
103 paging_transition = 1;
106 // Guest always sees the value they wrote
107 *guest_cr0 = *new_cr0;
109 // This value must always be set to 1
112 // Set the shadow register to catch non-virtualized flags
113 *shadow_cr0 = *guest_cr0;
115 // Paging is always enabled
118 // Was there a paging transition
119 // Meaning we need to change the page tables
120 if (paging_transition) {
121 if (v3_get_vm_mem_mode(info) == VIRTUAL_MEM) {
123 struct efer_64 * guest_efer = (struct efer_64 *)&(info->shdw_pg_state.guest_efer);
124 struct efer_64 * shadow_efer = (struct efer_64 *)&(info->ctrl_regs.efer);
126 // Check long mode LME to set LME
127 if (guest_efer->lme == 1) {
128 PrintDebug("Enabing Long Mode\n");
131 shadow_efer->lma = 1;
132 shadow_efer->lme = 1;
134 PrintDebug("New EFER %p\n", (void *)*(addr_t *)(shadow_efer));
137 PrintDebug("Activating Shadow Page Tables\n");
139 if (v3_activate_shadow_pt(info) == -1) {
140 PrintError("Failed to activate shadow page tables\n");
147 if (v3_activate_passthrough_pt(info) == -1) {
148 PrintError("Failed to activate passthrough page tables\n");
155 PrintDebug("New Guest CR0=%x\n",*(uint_t *)guest_cr0);
156 PrintDebug("New CR0=%x\n", *(uint_t *)shadow_cr0);
164 static int handle_clts(struct guest_info * info, struct x86_instr * dec_instr) {
166 struct cr0_32 * real_cr0 = (struct cr0_32*)&(info->ctrl_regs.cr0);
170 if (info->shdw_pg_mode == SHADOW_PAGING) {
171 struct cr0_32 * guest_cr0 = (struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
178 static int handle_lmsw(struct guest_info * info, struct x86_instr * dec_instr) {
179 struct cr0_real * real_cr0 = (struct cr0_real *)&(info->ctrl_regs.cr0);
180 // XED is a mess, and basically reverses the operand order for an LMSW
181 struct cr0_real * new_cr0 = (struct cr0_real *)(dec_instr->dst_operand.operand);
184 PrintDebug("LMSW\n");
186 new_cr0_val = (*(char*)(new_cr0)) & 0x0f;
188 PrintDebug("OperandVal = %x\n", new_cr0_val);
190 // We can just copy the new value through
191 // we don't need to virtualize the lower 4 bits
192 PrintDebug("Old CR0=%x\n", *(uint_t *)real_cr0);
193 *(uchar_t*)real_cr0 &= 0xf0;
194 *(uchar_t*)real_cr0 |= new_cr0_val;
195 PrintDebug("New CR0=%x\n", *(uint_t *)real_cr0);
198 // If Shadow paging is enabled we push the changes to the virtualized copy of cr0
199 if (info->shdw_pg_mode == SHADOW_PAGING) {
200 struct cr0_real * guest_cr0 = (struct cr0_real*)&(info->shdw_pg_state.guest_cr0);
202 PrintDebug("Old Guest CR0=%x\n", *(uint_t *)guest_cr0);
203 *(uchar_t*)guest_cr0 &= 0xf0;
204 *(uchar_t*)guest_cr0 |= new_cr0_val;
205 PrintDebug("New Guest CR0=%x\n", *(uint_t *)guest_cr0);
214 // First attempt = 253 lines
215 // current = 51 lines
216 int v3_handle_cr0_read(struct guest_info * info) {
219 struct x86_instr dec_instr;
221 if (info->mem_mode == PHYSICAL_MEM) {
222 ret = v3_read_gpa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
224 ret = v3_read_gva_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
228 if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
229 PrintError("Could not decode instruction\n");
233 if (dec_instr.op_type == V3_OP_MOVCR2) {
234 PrintDebug("MOVCR2 (mode=%s)\n", v3_cpu_mode_to_str(info->cpu_mode));
236 if ((v3_get_vm_cpu_mode(info) == LONG) ||
237 (v3_get_vm_cpu_mode(info) == LONG_32_COMPAT)) {
238 struct cr0_64 * dst_reg = (struct cr0_64 *)(dec_instr.dst_operand.operand);
240 if (info->shdw_pg_mode == SHADOW_PAGING) {
241 struct cr0_64 * guest_cr0 = (struct cr0_64 *)&(info->shdw_pg_state.guest_cr0);
242 *dst_reg = *guest_cr0;
244 struct cr0_64 * shadow_cr0 = (struct cr0_64 *)&(info->ctrl_regs.cr0);
245 *dst_reg = *shadow_cr0;
248 PrintDebug("returned CR0: %p\n", (void *)*(addr_t *)dst_reg);
250 struct cr0_32 * dst_reg = (struct cr0_32 *)(dec_instr.dst_operand.operand);
252 if (info->shdw_pg_mode == SHADOW_PAGING) {
253 struct cr0_32 * guest_cr0 = (struct cr0_32 *)&(info->shdw_pg_state.guest_cr0);
254 *dst_reg = *guest_cr0;
256 struct cr0_32 * shadow_cr0 = (struct cr0_32 *)&(info->ctrl_regs.cr0);
257 *dst_reg = *shadow_cr0;
260 PrintDebug("returned CR0: %x\n", *(uint_t*)dst_reg);
263 } else if (dec_instr.op_type == V3_OP_SMSW) {
264 struct cr0_real * shadow_cr0 = (struct cr0_real *)&(info->ctrl_regs.cr0);
265 struct cr0_real * dst_reg = (struct cr0_real *)(dec_instr.dst_operand.operand);
266 char cr0_val = *(char*)shadow_cr0 & 0x0f;
268 PrintDebug("SMSW\n");
270 // The lower 4 bits of the guest/shadow CR0 are mapped through
271 // We can treat nested and shadow paging the same here
272 *(char *)dst_reg &= 0xf0;
273 *(char *)dst_reg |= cr0_val;
276 PrintError("Unhandled opcode in handle_cr0_read\n");
280 info->rip += dec_instr.instr_length;
288 // First Attempt = 256 lines
289 // current = 65 lines
290 int v3_handle_cr3_write(struct guest_info * info) {
293 struct x86_instr dec_instr;
295 if (info->mem_mode == PHYSICAL_MEM) {
296 ret = v3_read_gpa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
298 ret = v3_read_gva_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
301 if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
302 PrintError("Could not decode instruction\n");
306 if (dec_instr.op_type == V3_OP_MOV2CR) {
307 PrintDebug("MOV2CR3 (cpu_mode=%s)\n", v3_cpu_mode_to_str(info->cpu_mode));
309 if (info->shdw_pg_mode == SHADOW_PAGING) {
310 PrintDebug("Old Shadow CR3=%p; Old Guest CR3=%p\n",
311 (void *)(addr_t)(info->ctrl_regs.cr3),
312 (void*)(addr_t)(info->shdw_pg_state.guest_cr3));
315 // We update the guest CR3
316 if (info->cpu_mode == LONG) {
317 struct cr3_64 * new_cr3 = (struct cr3_64 *)(dec_instr.src_operand.operand);
318 struct cr3_64 * guest_cr3 = (struct cr3_64 *)&(info->shdw_pg_state.guest_cr3);
319 *guest_cr3 = *new_cr3;
321 struct cr3_32 * new_cr3 = (struct cr3_32 *)(dec_instr.src_operand.operand);
322 struct cr3_32 * guest_cr3 = (struct cr3_32 *)&(info->shdw_pg_state.guest_cr3);
323 *guest_cr3 = *new_cr3;
327 // If Paging is enabled in the guest then we need to change the shadow page tables
328 if (info->mem_mode == VIRTUAL_MEM) {
329 if (v3_activate_shadow_pt(info) == -1) {
330 PrintError("Failed to activate 32 bit shadow page table\n");
335 PrintDebug("New Shadow CR3=%p; New Guest CR3=%p\n",
336 (void *)(addr_t)(info->ctrl_regs.cr3),
337 (void*)(addr_t)(info->shdw_pg_state.guest_cr3));
339 } else if (info->shdw_pg_mode == NESTED_PAGING) {
341 // This is just a passthrough operation which we probably don't need here
342 if (info->cpu_mode == LONG) {
343 struct cr3_64 * new_cr3 = (struct cr3_64 *)(dec_instr.src_operand.operand);
344 struct cr3_64 * guest_cr3 = (struct cr3_64 *)&(info->ctrl_regs.cr3);
345 *guest_cr3 = *new_cr3;
347 struct cr3_32 * new_cr3 = (struct cr3_32 *)(dec_instr.src_operand.operand);
348 struct cr3_32 * guest_cr3 = (struct cr3_32 *)&(info->ctrl_regs.cr3);
349 *guest_cr3 = *new_cr3;
354 PrintError("Unhandled opcode in handle_cr3_write\n");
358 info->rip += dec_instr.instr_length;
365 // first attempt = 156 lines
366 // current = 36 lines
367 int v3_handle_cr3_read(struct guest_info * info) {
370 struct x86_instr dec_instr;
372 if (info->mem_mode == PHYSICAL_MEM) {
373 ret = v3_read_gpa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
375 ret = v3_read_gva_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
378 if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
379 PrintError("Could not decode instruction\n");
383 if (dec_instr.op_type == V3_OP_MOVCR2) {
384 PrintDebug("MOVCR32 (mode=%s)\n", v3_cpu_mode_to_str(info->cpu_mode));
386 if (info->shdw_pg_mode == SHADOW_PAGING) {
388 if ((v3_get_vm_cpu_mode(info) == LONG) ||
389 (v3_get_vm_cpu_mode(info) == LONG_32_COMPAT)) {
390 struct cr3_64 * dst_reg = (struct cr3_64 *)(dec_instr.dst_operand.operand);
391 struct cr3_64 * guest_cr3 = (struct cr3_64 *)&(info->shdw_pg_state.guest_cr3);
392 *dst_reg = *guest_cr3;
394 struct cr3_32 * dst_reg = (struct cr3_32 *)(dec_instr.dst_operand.operand);
395 struct cr3_32 * guest_cr3 = (struct cr3_32 *)&(info->shdw_pg_state.guest_cr3);
396 *dst_reg = *guest_cr3;
399 } else if (info->shdw_pg_mode == NESTED_PAGING) {
401 // This is just a passthrough operation which we probably don't need here
402 if ((v3_get_vm_cpu_mode(info) == LONG) ||
403 (v3_get_vm_cpu_mode(info) == LONG_32_COMPAT)) {
404 struct cr3_64 * dst_reg = (struct cr3_64 *)(dec_instr.dst_operand.operand);
405 struct cr3_64 * guest_cr3 = (struct cr3_64 *)&(info->ctrl_regs.cr3);
406 *dst_reg = *guest_cr3;
408 struct cr3_32 * dst_reg = (struct cr3_32 *)(dec_instr.dst_operand.operand);
409 struct cr3_32 * guest_cr3 = (struct cr3_32 *)&(info->ctrl_regs.cr3);
410 *dst_reg = *guest_cr3;
415 PrintError("Unhandled opcode in handle_cr3_read\n");
419 info->rip += dec_instr.instr_length;
425 // We don't need to virtualize CR4, all we need is to detect the activation of PAE
426 int v3_handle_cr4_read(struct guest_info * info) {
427 // PrintError("CR4 Read not handled\n");
432 int v3_handle_cr4_write(struct guest_info * info) {
436 struct x86_instr dec_instr;
437 v3_cpu_mode_t cpu_mode = v3_get_vm_cpu_mode(info);
439 if (info->mem_mode == PHYSICAL_MEM) {
440 ret = v3_read_gpa_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
442 ret = v3_read_gva_memory(info, get_addr_linear(info, info->rip, &(info->segments.cs)), 15, instr);
445 if (v3_decode(info, (addr_t)instr, &dec_instr) == -1) {
446 PrintError("Could not decode instruction\n");
450 if (dec_instr.op_type != V3_OP_MOV2CR) {
451 PrintError("Invalid opcode in write to CR4\n");
455 // Check to see if we need to flush the tlb
457 if (v3_get_vm_mem_mode(info) == VIRTUAL_MEM) {
458 struct cr4_32 * new_cr4 = (struct cr4_32 *)(dec_instr.src_operand.operand);
459 struct cr4_32 * cr4 = (struct cr4_32 *)&(info->ctrl_regs.cr4);
461 // if pse, pge, or pae have changed while PG (in any mode) is on
462 // the side effect is a TLB flush, which means we need to
463 // toss the current shadow page tables too
466 // TODO - PAE FLAG needs to be special cased
467 if ((cr4->pse != new_cr4->pse) ||
468 (cr4->pge != new_cr4->pge) ||
469 (cr4->pae != new_cr4->pae)) {
470 PrintDebug("Handling PSE/PGE/PAE -> TLBFlush case, flag set\n");
477 if ((cpu_mode == PROTECTED) || (cpu_mode == PROTECTED_PAE)) {
478 struct cr4_32 * new_cr4 = (struct cr4_32 *)(dec_instr.src_operand.operand);
479 struct cr4_32 * cr4 = (struct cr4_32 *)&(info->ctrl_regs.cr4);
481 PrintDebug("OperandVal = %x, length = %d\n", *(uint_t *)new_cr4, dec_instr.src_operand.size);
482 PrintDebug("Old CR4=%x\n", *(uint_t *)cr4);
484 if ((info->shdw_pg_mode == SHADOW_PAGING)) {
485 if (v3_get_vm_mem_mode(info) == PHYSICAL_MEM) {
487 if ((cr4->pae == 0) && (new_cr4->pae == 1)) {
488 PrintDebug("Creating PAE passthrough tables\n");
490 // create 32 bit PAE direct map page table
491 if (v3_reset_passthrough_pts(info) == -1) {
492 PrintError("Could not create 32 bit PAE passthrough pages tables\n");
496 // reset cr3 to new page tables
497 info->ctrl_regs.cr3 = *(addr_t*)&(info->direct_map_pt);
499 } else if ((cr4->pae == 1) && (new_cr4->pae == 0)) {
500 // Create passthrough standard 32bit pagetables
501 PrintError("Switching From PAE to Protected mode not supported\n");
508 PrintDebug("New CR4=%x\n", *(uint_t *)cr4);
510 } else if ((cpu_mode == LONG) || (cpu_mode == LONG_32_COMPAT)) {
511 struct cr4_64 * new_cr4 = (struct cr4_64 *)(dec_instr.src_operand.operand);
512 struct cr4_64 * cr4 = (struct cr4_64 *)&(info->ctrl_regs.cr4);
514 PrintDebug("Old CR4=%p\n", (void *)*(addr_t *)cr4);
515 PrintDebug("New CR4=%p\n", (void *)*(addr_t *)new_cr4);
517 if (new_cr4->pae == 0) {
518 // cannot turn off PAE in long mode GPF the guest
519 PrintError("Cannot disable PAE in long mode, should send GPF\n");
526 PrintError("CR4 write not supported in CPU_MODE: %s\n", v3_cpu_mode_to_str(cpu_mode));
532 PrintDebug("Handling PSE/PGE/PAE -> TLBFlush (doing flush now!)\n");
533 if (v3_activate_shadow_pt(info) == -1) {
534 PrintError("Failed to activate shadow page tables when emulating TLB flush in handling cr4 write\n");
540 info->rip += dec_instr.instr_length;
545 int v3_handle_efer_read(struct guest_info * core, uint_t msr, struct v3_msr * dst, void * priv_data) {
546 PrintDebug("EFER Read HI=%x LO=%x\n", core->shdw_pg_state.guest_efer.hi, core->shdw_pg_state.guest_efer.lo);
548 dst->value = core->shdw_pg_state.guest_efer.value;
555 // TODO: this is a disaster we need to clean this up...
556 int v3_handle_efer_write(struct guest_info * core, uint_t msr, struct v3_msr src, void * priv_data) {
557 //struct efer_64 * new_efer = (struct efer_64 *)&(src.value);
558 struct efer_64 * shadow_efer = (struct efer_64 *)&(core->ctrl_regs.efer);
559 struct v3_msr * guest_efer = &(core->shdw_pg_state.guest_efer);
561 PrintDebug("EFER Write\n");
562 PrintDebug("EFER Write Values: HI=%x LO=%x\n", src.hi, src.lo);
563 //PrintDebug("Old EFER=%p\n", (void *)*(addr_t*)(shadow_efer));
565 // We virtualize the guests efer to hide the SVME and LMA bits
566 guest_efer->value = src.value;
569 // Enable/Disable Syscall
570 shadow_efer->sce = src.value & 0x1;