Palacios Public Git Repository

To checkout Palacios execute

  git clone http://v3vee.org/palacios/palacios.web/palacios.git
This will give you the master branch. You probably want the devel branch or one of the release branches. To switch to the devel branch, simply execute
  cd palacios
  git checkout --track -b devel origin/devel
The other branches are similar.


added arch independent MSR storage
[palacios.releases.git] / palacios / src / palacios / vmcs.c
1 /* 
2  * This file is part of the Palacios Virtual Machine Monitor developed
3  * by the V3VEE Project with funding from the United States National 
4  * Science Foundation and the Department of Energy.  
5  *
6  * The V3VEE Project is a joint project between Northwestern University
7  * and the University of New Mexico.  You can find out more at 
8  * http://www.v3vee.org
9  *
10  * Copyright (c) 2008, Jack Lange <jarusl@cs.northwestern.edu> 
11  * Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org> 
12  * All rights reserved.
13  *
14  * Author: Jack Lange <jarusl@cs.northwestern.edu>
15  *
16  * This is free software.  You are permitted to use,
17  * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
18  */
19
20 #include <palacios/vmcs.h>
21 #include <palacios/vmx_lowlevel.h>
22 #include <palacios/vmm.h>
23 #include <palacios/vmx.h>
24 #include <palacios/vm_guest_mem.h>
25 #include <palacios/vmm_ctrl_regs.h>
26 #include <palacios/vmm_lowlevel.h>
27
28
29
30
31
32 static int inline check_vmcs_write(vmcs_field_t field, addr_t val) {
33     int ret = 0;
34     ret = vmcs_write(field, val);
35
36     if (ret != VMX_SUCCESS) {
37         PrintError("VMWRITE error on %s!: %d\n", v3_vmcs_field_to_str(field), ret);
38         return 1;
39     }
40
41     return 0;
42 }
43
44 static int inline check_vmcs_read(vmcs_field_t field, void * val) {
45     int ret = 0;
46     ret = vmcs_read(field, val);
47
48     if (ret != VMX_SUCCESS) {
49         PrintError("VMREAD error on %s!: %d\n", v3_vmcs_field_to_str(field), ret);
50     }
51
52     return ret;
53 }
54
55
56
57
58
59
60
61 typedef enum { ES = 0, 
62                CS = 2,
63                SS = 4,
64                DS = 6, 
65                FS = 8, 
66                GS = 10, 
67                LDTR = 12, 
68                TR = 14, 
69                GDTR = 16, 
70                IDTR = 18} vmcs_seg_offsets_t;
71
72 typedef enum {BASE = VMCS_GUEST_ES_BASE,
73               LIMIT = VMCS_GUEST_ES_LIMIT, 
74               ACCESS = VMCS_GUEST_ES_ACCESS, 
75               SELECTOR = VMCS_GUEST_ES_SELECTOR } vmcs_seg_bases_t;
76  
77
78
79 static int v3_read_vmcs_segment(struct v3_segment * seg, vmcs_seg_offsets_t seg_type) {
80     vmcs_field_t selector = VMCS_GUEST_ES_SELECTOR + seg_type;
81     vmcs_field_t base = VMCS_GUEST_ES_BASE + seg_type;
82     vmcs_field_t limit = VMCS_GUEST_ES_LIMIT + seg_type;
83     vmcs_field_t access = VMCS_GUEST_ES_ACCESS + seg_type;
84     struct vmcs_segment vmcs_seg;
85
86     memset(&vmcs_seg, 0, sizeof(struct vmcs_segment));
87
88     check_vmcs_read(limit, &(vmcs_seg.limit));
89     check_vmcs_read(base, &(vmcs_seg.base));
90
91     if ((seg_type != GDTR) && (seg_type != IDTR)) {
92         check_vmcs_read(selector, &(vmcs_seg.selector));
93         check_vmcs_read(access, &(vmcs_seg.access.val)); 
94     }
95
96     v3_vmxseg_to_seg(&vmcs_seg, seg);
97
98     return 0;
99 }
100
101 static int v3_write_vmcs_segment(struct v3_segment * seg, vmcs_seg_offsets_t seg_type) {
102     vmcs_field_t selector = VMCS_GUEST_ES_SELECTOR + seg_type;
103     vmcs_field_t base = VMCS_GUEST_ES_BASE + seg_type;
104     vmcs_field_t limit = VMCS_GUEST_ES_LIMIT + seg_type;
105     vmcs_field_t access = VMCS_GUEST_ES_ACCESS + seg_type;
106     struct vmcs_segment vmcs_seg;
107
108     v3_seg_to_vmxseg(seg, &vmcs_seg);
109
110     check_vmcs_write(limit, vmcs_seg.limit);
111     check_vmcs_write(base, vmcs_seg.base);
112
113     if ((seg_type != GDTR) && (seg_type != IDTR)) {
114         check_vmcs_write(access, vmcs_seg.access.val); 
115         check_vmcs_write(selector, vmcs_seg.selector);
116     }
117
118     return 0;
119 }
120
121 int v3_read_vmcs_segments(struct v3_segments * segs) {
122     v3_read_vmcs_segment(&(segs->cs), CS);
123     v3_read_vmcs_segment(&(segs->ds), DS);
124     v3_read_vmcs_segment(&(segs->es), ES);
125     v3_read_vmcs_segment(&(segs->fs), FS);
126     v3_read_vmcs_segment(&(segs->gs), GS);
127     v3_read_vmcs_segment(&(segs->ss), SS);
128     v3_read_vmcs_segment(&(segs->ldtr), LDTR);
129     v3_read_vmcs_segment(&(segs->gdtr), GDTR);
130     v3_read_vmcs_segment(&(segs->idtr), IDTR);
131     v3_read_vmcs_segment(&(segs->tr), TR);
132
133     return 0;
134 }
135
136 int v3_write_vmcs_segments(struct v3_segments * segs) {
137     v3_write_vmcs_segment(&(segs->cs), CS);
138     v3_write_vmcs_segment(&(segs->ds), DS);
139     v3_write_vmcs_segment(&(segs->es), ES);
140     v3_write_vmcs_segment(&(segs->fs), FS);
141     v3_write_vmcs_segment(&(segs->gs), GS);
142     v3_write_vmcs_segment(&(segs->ss), SS);
143     v3_write_vmcs_segment(&(segs->ldtr), LDTR);
144     v3_write_vmcs_segment(&(segs->gdtr), GDTR);
145     v3_write_vmcs_segment(&(segs->idtr), IDTR);
146     v3_write_vmcs_segment(&(segs->tr), TR);
147
148     return 0;
149 }
150
151
152 void v3_vmxseg_to_seg(struct vmcs_segment * vmcs_seg, struct v3_segment * seg) {
153     memset(seg, 0, sizeof(struct v3_segment));
154
155     seg->selector = vmcs_seg->selector;
156     seg->limit = vmcs_seg->limit;
157     seg->base = vmcs_seg->base;
158
159     seg->type = vmcs_seg->access.type;
160     seg->system = vmcs_seg->access.desc_type;
161     seg->dpl = vmcs_seg->access.dpl;
162     seg->present = vmcs_seg->access.present;
163     seg->avail = vmcs_seg->access.avail;
164     seg->long_mode = vmcs_seg->access.long_mode;
165     seg->db = vmcs_seg->access.db;
166     seg->granularity = vmcs_seg->access.granularity;
167     seg->unusable = vmcs_seg->access.unusable;
168
169 }
170
171 void v3_seg_to_vmxseg(struct v3_segment * seg, struct vmcs_segment * vmcs_seg) {
172     memset(vmcs_seg, 0, sizeof(struct vmcs_segment));
173
174     vmcs_seg->selector = seg->selector;
175     vmcs_seg->limit = seg->limit;
176     vmcs_seg->base = seg->base;
177
178     vmcs_seg->access.type = seg->type;
179     vmcs_seg->access.desc_type = seg->system;
180     vmcs_seg->access.dpl = seg->dpl;
181     vmcs_seg->access.present = seg->present;
182     vmcs_seg->access.avail = seg->avail;
183     vmcs_seg->access.long_mode = seg->long_mode;
184     vmcs_seg->access.db = seg->db;
185     vmcs_seg->access.granularity = seg->granularity;
186     vmcs_seg->access.unusable = seg->unusable;
187 }
188
189
190
191
192 int v3_update_vmcs_ctrl_fields(struct guest_info * info) {
193     int vmx_ret = 0;
194     struct vmx_data * arch_data = (struct vmx_data *)(info->vmm_data);
195
196     vmx_ret |= check_vmcs_write(VMCS_PIN_CTRLS, arch_data->pin_ctrls.value);
197     vmx_ret |= check_vmcs_write(VMCS_PROC_CTRLS, arch_data->pri_proc_ctrls.value);
198
199     if (arch_data->pri_proc_ctrls.sec_ctrls) {
200         vmx_ret |= check_vmcs_write(VMCS_SEC_PROC_CTRLS, arch_data->sec_proc_ctrls.value);
201     }
202
203     vmx_ret |= check_vmcs_write(VMCS_EXIT_CTRLS, arch_data->exit_ctrls.value);
204     vmx_ret |= check_vmcs_write(VMCS_ENTRY_CTRLS, arch_data->entry_ctrls.value);
205     vmx_ret |= check_vmcs_write(VMCS_EXCP_BITMAP, arch_data->excp_bmap.value);
206
207     if (info->shdw_pg_mode == NESTED_PAGING) {
208         vmx_ret |= check_vmcs_write(VMCS_EPT_PTR, info->direct_map_pt);
209     }
210
211     return vmx_ret;
212 }
213
214
215
216
217
218
219 int v3_vmx_save_vmcs(struct guest_info * info) {
220     struct vmx_data * vmx_info = (struct vmx_data *)(info->vmm_data);
221     int error = 0;
222
223     check_vmcs_read(VMCS_GUEST_RIP, &(info->rip));
224     check_vmcs_read(VMCS_GUEST_RSP, &(info->vm_regs.rsp));
225
226     check_vmcs_read(VMCS_GUEST_CR0, &(info->ctrl_regs.cr0));
227     check_vmcs_read(VMCS_CR0_READ_SHDW, &(info->shdw_pg_state.guest_cr0));
228     check_vmcs_read(VMCS_GUEST_CR3, &(info->ctrl_regs.cr3));
229     check_vmcs_read(VMCS_GUEST_CR4, &(info->ctrl_regs.cr4));
230     check_vmcs_read(VMCS_CR4_READ_SHDW, &(vmx_info->guest_cr4));
231     check_vmcs_read(VMCS_GUEST_DR7, &(info->dbg_regs.dr7));
232
233     check_vmcs_read(VMCS_GUEST_RFLAGS, &(info->ctrl_regs.rflags));
234
235 #ifdef __V3_64BIT__
236     check_vmcs_read(VMCS_GUEST_EFER, &(info->ctrl_regs.efer));
237     check_vmcs_read(VMCS_ENTRY_CTRLS, &(vmx_info->entry_ctrls.value));
238 #endif
239     
240     error =  v3_read_vmcs_segments(&(info->segments));
241
242     /* Save MSRs from MSR SAVE Area (whereever that is...)*/
243
244     info->msrs.star = vmx_info->msr_area->guest_star.hi;
245     info->msrs.star <<= 32;
246     info->msrs.star |= vmx_info->msr_area->guest_star.lo;
247
248     info->msrs.lstar = vmx_info->msr_area->guest_lstar.hi;
249     info->msrs.lstar <<= 32;
250     info->msrs.lstar |= vmx_info->msr_area->guest_lstar.lo;
251
252     info->msrs.sfmask = vmx_info->msr_area->guest_fmask.hi;
253     info->msrs.sfmask <<= 32;
254     info->msrs.sfmask |= vmx_info->msr_area->guest_fmask.lo;
255
256     info->msrs.kern_gs_base = vmx_info->msr_area->guest_kern_gs.hi;
257     info->msrs.kern_gs_base <<= 32;
258     info->msrs.kern_gs_base |= vmx_info->msr_area->guest_kern_gs.lo;
259
260
261     return error;
262 }
263
264
265 int v3_vmx_restore_vmcs(struct guest_info * info) {
266     struct vmx_data * vmx_info = (struct vmx_data *)(info->vmm_data);
267     int error = 0;
268
269     check_vmcs_write(VMCS_GUEST_RIP, info->rip);
270     check_vmcs_write(VMCS_GUEST_RSP, info->vm_regs.rsp);
271
272     check_vmcs_write(VMCS_GUEST_CR0, info->ctrl_regs.cr0);
273     check_vmcs_write(VMCS_CR0_READ_SHDW, info->shdw_pg_state.guest_cr0);
274     check_vmcs_write(VMCS_GUEST_CR3, info->ctrl_regs.cr3);
275     check_vmcs_write(VMCS_GUEST_CR4, info->ctrl_regs.cr4);
276     check_vmcs_write(VMCS_CR4_READ_SHDW, vmx_info->guest_cr4);
277     check_vmcs_write(VMCS_GUEST_DR7, info->dbg_regs.dr7);
278
279     check_vmcs_write(VMCS_GUEST_RFLAGS, info->ctrl_regs.rflags);
280
281 #ifdef __V3_64BIT__
282     check_vmcs_write(VMCS_GUEST_EFER, info->ctrl_regs.efer);
283     check_vmcs_write(VMCS_ENTRY_CTRLS, vmx_info->entry_ctrls.value);
284 #endif
285
286     error = v3_write_vmcs_segments(&(info->segments));
287
288     /* Restore MSRs from MSR SAVE Area (whereever that is...)*/
289
290     vmx_info->msr_area->guest_star.hi = (info->msrs.star >> 32);
291     vmx_info->msr_area->guest_star.lo = (info->msrs.star & 0xffffffff);
292
293     vmx_info->msr_area->guest_lstar.hi = (info->msrs.lstar >> 32);
294     vmx_info->msr_area->guest_lstar.lo = (info->msrs.lstar & 0xffffffff);
295
296     vmx_info->msr_area->guest_fmask.hi = (info->msrs.sfmask >> 32);
297     vmx_info->msr_area->guest_fmask.lo = (info->msrs.sfmask & 0xffffffff);
298
299     vmx_info->msr_area->guest_kern_gs.hi = (info->msrs.kern_gs_base >> 32);
300     vmx_info->msr_area->guest_kern_gs.lo = (info->msrs.kern_gs_base & 0xffffffff);
301
302     return error;
303
304 }
305
306
307
308 int v3_update_vmcs_host_state(struct guest_info * info) {
309     int vmx_ret = 0;
310     addr_t tmp;
311     struct v3_msr tmp_msr;
312     addr_t gdtr_base;
313     struct {
314         uint16_t selector;
315         addr_t   base;
316     } __attribute__((packed)) tmp_seg;
317
318 #ifdef __V3_64BIT__
319     __asm__ __volatile__ ( "movq    %%cr0, %0; "                
320                            : "=q"(tmp)
321                            :
322     );
323 #else
324     __asm__ __volatile__ ( "movl    %%cr0, %0; "                
325                            : "=q"(tmp)
326                            :
327     );
328 #endif    
329     vmx_ret |= check_vmcs_write(VMCS_HOST_CR0, tmp);
330
331
332 #ifdef __V3_64BIT__
333     __asm__ __volatile__ ( "movq %%cr3, %0; "           
334                            : "=q"(tmp)
335                            :
336     );
337 #else
338     __asm__ __volatile__ ( "movl %%cr3, %0; "           
339                            : "=q"(tmp)
340                            :
341     );
342 #endif
343     vmx_ret |= check_vmcs_write(VMCS_HOST_CR3, tmp);
344
345
346 #ifdef __V3_64BIT__
347     __asm__ __volatile__ ( "movq %%cr4, %0; "           
348                            : "=q"(tmp)
349                            :
350     );
351 #else
352     __asm__ __volatile__ ( "movl %%cr4, %0; "           
353                            : "=q"(tmp)
354                            :
355     );
356 #endif
357     vmx_ret |= check_vmcs_write(VMCS_HOST_CR4, tmp);
358
359
360     __asm__ __volatile__(
361                          "sgdt (%0);"
362                          :
363                          : "q"(&tmp_seg)
364                          : "memory"
365                          );
366     gdtr_base = tmp_seg.base;
367     vmx_ret |= check_vmcs_write(VMCS_HOST_GDTR_BASE, tmp_seg.base);
368
369     __asm__ __volatile__(
370                          "sidt (%0);"
371                          :
372                          : "q"(&tmp_seg)
373                          : "memory"
374                          );
375     vmx_ret |= check_vmcs_write(VMCS_HOST_IDTR_BASE, tmp_seg.base);
376
377     __asm__ __volatile__(
378                          "str (%0);"
379                          :
380                          : "q"(&tmp_seg)
381                          : "memory"
382                          );
383     vmx_ret |= check_vmcs_write(VMCS_HOST_TR_SELECTOR, tmp_seg.selector);
384
385     /* The GDTR *index* is bits 3-15 of the selector. */
386     {
387         struct tss_descriptor * desc = NULL;
388         desc = (struct tss_descriptor *)(gdtr_base + (8 * (tmp_seg.selector >> 3)));
389
390         tmp_seg.base = ((desc->base1) |
391                         (desc->base2 << 16) |
392                         (desc->base3 << 24) |
393 #ifdef __V3_64BIT__
394                         ((uint64_t)desc->base4 << 32)
395 #else
396                         (0)
397 #endif
398                         );
399
400         vmx_ret |= check_vmcs_write(VMCS_HOST_TR_BASE, tmp_seg.base);
401     }
402
403
404 #ifdef __V3_64BIT__
405     __asm__ __volatile__ ( "movq %%cs, %0; "            
406                            : "=q"(tmp)
407                            :
408     );
409 #else
410     __asm__ __volatile__ ( "movl %%cs, %0; "            
411                            : "=q"(tmp)
412                            :
413     );
414 #endif
415     vmx_ret |= check_vmcs_write(VMCS_HOST_CS_SELECTOR, tmp);
416
417 #ifdef __V3_64BIT__
418     __asm__ __volatile__ ( "movq %%ss, %0; "            
419                            : "=q"(tmp)
420                            :
421     );
422 #else
423     __asm__ __volatile__ ( "movl %%ss, %0; "            
424                            : "=q"(tmp)
425                            :
426     );
427 #endif
428     vmx_ret |= check_vmcs_write(VMCS_HOST_SS_SELECTOR, tmp);
429
430 #ifdef __V3_64BIT__
431     __asm__ __volatile__ ( "movq %%ds, %0; "            
432                            : "=q"(tmp)
433                            :
434     );
435 #else
436     __asm__ __volatile__ ( "movl %%ds, %0; "            
437                            : "=q"(tmp)
438                            :
439     );
440 #endif
441     vmx_ret |= check_vmcs_write(VMCS_HOST_DS_SELECTOR, tmp);
442
443 #ifdef __V3_64BIT__
444     __asm__ __volatile__ ( "movq %%es, %0; "            
445                            : "=q"(tmp)
446                            :
447     );
448 #else
449     __asm__ __volatile__ ( "movl %%es, %0; "            
450                            : "=q"(tmp)
451                            :
452     );
453 #endif
454     vmx_ret |= check_vmcs_write(VMCS_HOST_ES_SELECTOR, tmp);
455
456 #ifdef __V3_64BIT__
457     __asm__ __volatile__ ( "movq %%fs, %0; "            
458                            : "=q"(tmp)
459                            :
460     );
461 #else
462     __asm__ __volatile__ ( "movl %%fs, %0; "            
463                            : "=q"(tmp)
464                            :
465     );
466 #endif
467     vmx_ret |= check_vmcs_write(VMCS_HOST_FS_SELECTOR, tmp);
468
469 #ifdef __V3_64BIT__
470     __asm__ __volatile__ ( "movq %%gs, %0; "            
471                            : "=q"(tmp)
472                            :
473     );
474 #else
475     __asm__ __volatile__ ( "movl %%gs, %0; "            
476                            : "=q"(tmp)
477                            :
478     );
479 #endif
480     vmx_ret |= check_vmcs_write(VMCS_HOST_GS_SELECTOR, tmp);
481
482
483 #define SYSENTER_CS_MSR 0x00000174
484 #define SYSENTER_ESP_MSR 0x00000175
485 #define SYSENTER_EIP_MSR 0x00000176
486 #define FS_BASE_MSR 0xc0000100
487 #define GS_BASE_MSR 0xc0000101
488 #define EFER_MSR 0xc0000080
489
490
491     // SYSENTER CS MSR
492     v3_get_msr(SYSENTER_CS_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
493     vmx_ret |= check_vmcs_write(VMCS_HOST_SYSENTER_CS, tmp_msr.lo);
494
495     // SYSENTER_ESP MSR
496     v3_get_msr(SYSENTER_ESP_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
497     vmx_ret |= check_vmcs_write(VMCS_HOST_SYSENTER_ESP, tmp_msr.value);
498
499     // SYSENTER_EIP MSR
500     v3_get_msr(SYSENTER_EIP_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
501     vmx_ret |= check_vmcs_write(VMCS_HOST_SYSENTER_EIP, tmp_msr.value);
502
503
504     // FS.BASE MSR
505     v3_get_msr(FS_BASE_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
506     vmx_ret |= check_vmcs_write(VMCS_HOST_FS_BASE, tmp_msr.value);    
507
508     // GS.BASE MSR
509     v3_get_msr(GS_BASE_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
510     vmx_ret |= check_vmcs_write(VMCS_HOST_GS_BASE, tmp_msr.value);    
511
512
513     // EFER
514     v3_get_msr(EFER_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
515     vmx_ret |= check_vmcs_write(VMCS_HOST_EFER, tmp_msr.value);
516
517     // PERF GLOBAL CONTROL
518
519     // PAT
520
521     v3_get_msr(IA32_PAT_MSR, &(tmp_msr.hi), &(tmp_msr.lo));
522     vmx_ret |= check_vmcs_write(VMCS_HOST_PAT, tmp_msr.value);  
523
524
525     // save STAR, LSTAR, FMASK, KERNEL_GS_BASE MSRs in MSR load/store area
526     {
527         struct vmx_data * vmx_state = (struct vmx_data *)info->vmm_data;
528         struct vmcs_msr_save_area * msr_entries = vmx_state->msr_area;
529
530     
531         v3_get_msr(IA32_STAR_MSR, &(msr_entries->host_star.hi), &(msr_entries->host_star.lo));
532         v3_get_msr(IA32_LSTAR_MSR, &(msr_entries->host_lstar.hi), &(msr_entries->host_lstar.lo));
533         v3_get_msr(IA32_FMASK_MSR, &(msr_entries->host_fmask.hi), &(msr_entries->host_fmask.lo));
534         v3_get_msr(IA32_KERN_GS_BASE_MSR, &(msr_entries->host_kern_gs.hi), &(msr_entries->host_kern_gs.lo));
535     }
536
537     
538
539
540
541     return vmx_ret;
542 }
543
544
545
546
547
548
549 static inline void print_vmcs_field(vmcs_field_t vmcs_index) {
550     int len = v3_vmcs_get_field_len(vmcs_index);
551     addr_t val;
552     
553     if (vmcs_read(vmcs_index, &val) != VMX_SUCCESS) {
554         PrintError("VMCS_READ error for %s\n", v3_vmcs_field_to_str(vmcs_index));
555         return;
556     };
557     
558     if (len == 2) {
559         PrintDebug("\t%s: 0x%.4x\n", v3_vmcs_field_to_str(vmcs_index), (uint16_t)val);
560     } else if (len == 4) {
561         PrintDebug("\t%s: 0x%.8x\n", v3_vmcs_field_to_str(vmcs_index), (uint32_t)val);
562     } else if (len == 8) {
563         PrintDebug("\t%s: 0x%p\n", v3_vmcs_field_to_str(vmcs_index), (void *)(addr_t)val);
564     }
565 }
566
567
568 static void print_vmcs_segments() {
569     struct v3_segments segs; 
570
571     v3_read_vmcs_segments(&segs);
572     v3_print_segments(&segs);
573
574
575     PrintDebug("   ==> CS\n");
576     print_vmcs_field(VMCS_GUEST_CS_SELECTOR);
577     print_vmcs_field(VMCS_GUEST_CS_BASE);
578     print_vmcs_field(VMCS_GUEST_CS_LIMIT);
579     print_vmcs_field(VMCS_GUEST_CS_ACCESS);
580
581     PrintDebug("   ==> SS\n");
582     print_vmcs_field(VMCS_GUEST_SS_SELECTOR);
583     print_vmcs_field(VMCS_GUEST_SS_BASE);
584     print_vmcs_field(VMCS_GUEST_SS_LIMIT);
585     print_vmcs_field(VMCS_GUEST_SS_ACCESS);
586
587     PrintDebug("   ==> DS\n");
588     print_vmcs_field(VMCS_GUEST_DS_SELECTOR);
589     print_vmcs_field(VMCS_GUEST_DS_BASE);
590     print_vmcs_field(VMCS_GUEST_DS_LIMIT);
591     print_vmcs_field(VMCS_GUEST_DS_ACCESS);
592
593     PrintDebug("   ==> ES\n");
594     print_vmcs_field(VMCS_GUEST_ES_SELECTOR);
595     print_vmcs_field(VMCS_GUEST_ES_BASE);
596     print_vmcs_field(VMCS_GUEST_ES_LIMIT);
597     print_vmcs_field(VMCS_GUEST_ES_ACCESS);
598
599     PrintDebug("   ==> FS\n");
600     print_vmcs_field(VMCS_GUEST_FS_SELECTOR);
601     print_vmcs_field(VMCS_GUEST_FS_BASE);
602     print_vmcs_field(VMCS_GUEST_FS_LIMIT);
603     print_vmcs_field(VMCS_GUEST_FS_ACCESS);
604
605     PrintDebug("   ==> GS\n");
606     print_vmcs_field(VMCS_GUEST_GS_SELECTOR);
607     print_vmcs_field(VMCS_GUEST_GS_BASE);
608     print_vmcs_field(VMCS_GUEST_GS_LIMIT);
609     print_vmcs_field(VMCS_GUEST_GS_ACCESS);
610
611     PrintDebug("   ==> LDTR\n");
612     print_vmcs_field(VMCS_GUEST_LDTR_SELECTOR);
613     print_vmcs_field(VMCS_GUEST_LDTR_BASE);
614     print_vmcs_field(VMCS_GUEST_LDTR_LIMIT);
615     print_vmcs_field(VMCS_GUEST_LDTR_ACCESS);
616
617     PrintDebug("   ==> TR\n");
618     print_vmcs_field(VMCS_GUEST_TR_SELECTOR);
619     print_vmcs_field(VMCS_GUEST_TR_BASE);
620     print_vmcs_field(VMCS_GUEST_TR_LIMIT);
621     print_vmcs_field(VMCS_GUEST_TR_ACCESS);
622
623     PrintDebug("   ==> GDTR\n");
624     print_vmcs_field(VMCS_GUEST_GDTR_BASE);
625     print_vmcs_field(VMCS_GUEST_GDTR_LIMIT);
626
627     PrintDebug("   ==> IDTR\n");
628     print_vmcs_field(VMCS_GUEST_IDTR_BASE);
629     print_vmcs_field(VMCS_GUEST_IDTR_LIMIT);
630
631
632 }
633
634
635
636
637 static void print_guest_state()
638 {
639     PrintDebug("VMCS_GUEST_STATE\n");
640     print_vmcs_field(VMCS_GUEST_RIP);
641     print_vmcs_field(VMCS_GUEST_RSP);
642     print_vmcs_field(VMCS_GUEST_RFLAGS);
643     print_vmcs_field(VMCS_GUEST_CR0);
644     print_vmcs_field(VMCS_GUEST_CR3);
645     print_vmcs_field(VMCS_GUEST_CR4);
646     print_vmcs_field(VMCS_GUEST_DR7);
647
648     // if save IA32_EFER
649     print_vmcs_field(VMCS_GUEST_EFER);
650 #ifdef __V3_32BIT__
651     print_vmcs_field(VMCS_GUEST_EFER_HIGH);
652 #endif
653
654
655     PrintDebug("\n");
656
657     print_vmcs_segments();
658
659     PrintDebug("\n");
660
661     print_vmcs_field(VMCS_GUEST_DBG_CTL);
662 #ifdef __V3_32BIT__
663     print_vmcs_field(VMCS_GUEST_DBG_CTL_HIGH);
664 #endif
665     print_vmcs_field(VMCS_GUEST_SYSENTER_CS);
666     print_vmcs_field(VMCS_GUEST_SYSENTER_ESP);
667     print_vmcs_field(VMCS_GUEST_SYSENTER_EIP);
668
669
670     // if save IA32_PAT
671     print_vmcs_field(VMCS_GUEST_PAT);
672 #ifdef __V3_32BIT__
673     print_vmcs_field(VMCS_GUEST_PAT_HIGH);
674 #endif
675
676     //if load  IA32_PERF_GLOBAL_CTRL
677     print_vmcs_field(VMCS_GUEST_PERF_GLOBAL_CTRL);
678 #ifdef __V3_32BIT__
679     print_vmcs_field(VMCS_GUEST_PERF_GLOBAL_CTRL_HIGH);
680 #endif
681
682     print_vmcs_field(VMCS_GUEST_SMBASE);
683
684
685
686
687     PrintDebug("GUEST_NON_REGISTER_STATE\n");
688
689     print_vmcs_field(VMCS_GUEST_ACTIVITY_STATE);
690     print_vmcs_field(VMCS_GUEST_INT_STATE);
691     print_vmcs_field(VMCS_GUEST_PENDING_DBG_EXCP);
692
693     // if VMX preempt timer
694     print_vmcs_field(VMCS_PREEMPT_TIMER);
695
696 }
697        
698 static void print_host_state()
699 {
700     PrintDebug("VMCS_HOST_STATE\n");
701
702     print_vmcs_field(VMCS_HOST_RIP);
703     print_vmcs_field(VMCS_HOST_RSP);
704     print_vmcs_field(VMCS_HOST_CR0);
705     print_vmcs_field(VMCS_HOST_CR3);
706     print_vmcs_field(VMCS_HOST_CR4);
707     
708
709
710     // if load IA32_EFER
711     print_vmcs_field(VMCS_HOST_EFER);
712 #ifdef __V3_32BIT__
713     print_vmcs_field(VMCS_HOST_EFER_HIGH);
714 #endif
715
716
717     PrintDebug("\n");
718     print_vmcs_field(VMCS_HOST_CS_SELECTOR);
719     print_vmcs_field(VMCS_HOST_SS_SELECTOR);
720     print_vmcs_field(VMCS_HOST_DS_SELECTOR);
721     print_vmcs_field(VMCS_HOST_ES_SELECTOR);
722     print_vmcs_field(VMCS_HOST_FS_SELECTOR);
723     print_vmcs_field(VMCS_HOST_GS_SELECTOR);
724     print_vmcs_field(VMCS_HOST_TR_SELECTOR);
725
726     PrintDebug("\n");
727     print_vmcs_field(VMCS_HOST_FS_BASE);
728     print_vmcs_field(VMCS_HOST_GS_BASE);
729     print_vmcs_field(VMCS_HOST_TR_BASE);
730     print_vmcs_field(VMCS_HOST_GDTR_BASE);
731     print_vmcs_field(VMCS_HOST_IDTR_BASE);
732
733     PrintDebug("\n");
734     print_vmcs_field(VMCS_HOST_SYSENTER_CS);
735     print_vmcs_field(VMCS_HOST_SYSENTER_ESP);
736     print_vmcs_field(VMCS_HOST_SYSENTER_EIP);
737
738
739     // if load IA32_PAT
740     print_vmcs_field(VMCS_HOST_PAT);
741 #ifdef __V3_32BIT__
742     print_vmcs_field(VMCS_HOST_PAT_HIGH);
743 #endif
744
745     // if load IA32_PERF_GLOBAL_CTRL
746     print_vmcs_field(VMCS_HOST_PERF_GLOBAL_CTRL);
747 #ifdef __V3_32BIT__
748     print_vmcs_field(VMCS_HOST_PERF_GLOBAL_CTRL_HIGH);
749 #endif
750 }
751
752
753 static void print_exec_ctrls() {
754     PrintDebug("VMCS_EXEC_CTRL_FIELDS\n");
755     print_vmcs_field(VMCS_PIN_CTRLS);
756     print_vmcs_field(VMCS_PROC_CTRLS);
757     
758     // if activate secondary controls
759     print_vmcs_field(VMCS_SEC_PROC_CTRLS);
760     
761     print_vmcs_field(VMCS_EXCP_BITMAP);
762     print_vmcs_field(VMCS_PG_FAULT_ERR_MASK);
763     print_vmcs_field(VMCS_PG_FAULT_ERR_MATCH);
764
765     print_vmcs_field(VMCS_IO_BITMAP_A_ADDR);
766 #ifdef __V3_32BIT__
767     print_vmcs_field(VMCS_IO_BITMAP_A_ADDR_HIGH);
768 #endif
769
770     print_vmcs_field(VMCS_IO_BITMAP_B_ADDR);
771 #ifdef __V3_32BIT__
772     print_vmcs_field(VMCS_IO_BITMAP_B_ADDR_HIGH);
773 #endif
774
775     print_vmcs_field(VMCS_TSC_OFFSET);
776 #ifdef __V3_32BIT__
777     print_vmcs_field(VMCS_TSC_OFFSET_HIGH);
778 #endif
779
780     PrintDebug("\n");
781
782     print_vmcs_field(VMCS_CR0_MASK);
783     print_vmcs_field(VMCS_CR0_READ_SHDW);
784     print_vmcs_field(VMCS_CR4_MASK);
785     print_vmcs_field(VMCS_CR4_READ_SHDW);
786
787     print_vmcs_field(VMCS_CR3_TGT_CNT);
788     print_vmcs_field(VMCS_CR3_TGT_VAL_0);
789     print_vmcs_field(VMCS_CR3_TGT_VAL_1);
790     print_vmcs_field(VMCS_CR3_TGT_VAL_2);
791     print_vmcs_field(VMCS_CR3_TGT_VAL_3);
792
793     // Check max number of CR3 targets... may continue...
794
795
796     PrintDebug("\n");
797
798     // if virtualize apic accesses
799     print_vmcs_field(VMCS_APIC_ACCESS_ADDR);    
800 #ifdef __V3_32BIT__
801     print_vmcs_field(VMCS_APIC_ACCESS_ADDR_HIGH);
802 #endif
803
804     // if use tpr shadow
805     print_vmcs_field(VMCS_VAPIC_ADDR);    
806 #ifdef __V3_32BIT__
807     print_vmcs_field(VMCS_VAPIC_ADDR_HIGH);
808 #endif
809
810     // if use tpr shadow
811     print_vmcs_field(VMCS_TPR_THRESHOLD);
812
813
814     // if use MSR bitmaps
815     print_vmcs_field(VMCS_MSR_BITMAP);
816 #ifdef __V3_32BIT__
817     print_vmcs_field(VMCS_MSR_BITMAP_HIGH);
818 #endif
819
820     print_vmcs_field(VMCS_EXEC_PTR);
821 #ifdef __V3_32BIT__
822     print_vmcs_field(VMCS_EXEC_PTR_HIGH);
823 #endif
824
825
826 }
827
828 static void print_ept_state() {
829     V3_Print("VMCS EPT INFO\n");
830
831     // if enable vpid
832     print_vmcs_field(VMCS_VPID);
833
834     print_vmcs_field(VMCS_EPT_PTR);
835 #ifdef __V3_32BIT__
836     print_vmcs_field(VMCS_EPT_PTR_HIGH);
837 #endif
838
839     print_vmcs_field(VMCS_GUEST_PHYS_ADDR);
840 #ifdef __V3_32BIT__
841     print_vmcs_field(VMCS_GUEST_PHYS_ADDR_HIGH);
842 #endif
843
844
845
846     print_vmcs_field(VMCS_GUEST_PDPTE0);
847 #ifdef __V3_32BIT__
848     print_vmcs_field(VMCS_GUEST_PDPTE0_HIGH);
849 #endif
850
851     print_vmcs_field(VMCS_GUEST_PDPTE1);
852 #ifdef __V3_32BIT__
853     print_vmcs_field(VMCS_GUEST_PDPTE1_HIGH);
854 #endif
855
856     print_vmcs_field(VMCS_GUEST_PDPTE2);
857 #ifdef __V3_32BIT__
858     print_vmcs_field(VMCS_GUEST_PDPTE2_HIGH);
859 #endif
860
861     print_vmcs_field(VMCS_GUEST_PDPTE3);
862 #ifdef __V3_32BIT__
863     print_vmcs_field(VMCS_GUEST_PDPTE3_HIGH);
864 #endif
865
866
867
868 }
869
870
871 static void print_exit_ctrls() {
872     PrintDebug("VMCS_EXIT_CTRLS\n");
873
874     print_vmcs_field(VMCS_EXIT_CTRLS);
875
876
877     print_vmcs_field(VMCS_EXIT_MSR_STORE_CNT);
878     print_vmcs_field(VMCS_EXIT_MSR_STORE_ADDR);
879 #ifdef __V3_32BIT__
880     print_vmcs_field(VMCS_EXIT_MSR_STORE_ADDR_HIGH);
881 #endif
882
883     print_vmcs_field(VMCS_EXIT_MSR_LOAD_CNT);
884     print_vmcs_field(VMCS_EXIT_MSR_LOAD_ADDR);
885 #ifdef __V3_32BIT__
886     print_vmcs_field(VMCS_EXIT_MSR_LOAD_ADDR_HIGH);
887 #endif
888
889
890     // if pause loop exiting
891     print_vmcs_field(VMCS_PLE_GAP);
892     print_vmcs_field(VMCS_PLE_WINDOW);
893
894 }
895
896
897 static void print_entry_ctrls() {
898     PrintDebug("VMCS_ENTRY_CTRLS\n");
899     
900     print_vmcs_field(VMCS_ENTRY_CTRLS);
901
902     print_vmcs_field(VMCS_ENTRY_MSR_LOAD_CNT);
903     print_vmcs_field(VMCS_ENTRY_MSR_LOAD_ADDR);
904 #ifdef __V3_32BIT__
905     print_vmcs_field(VMCS_ENTRY_MSR_LOAD_ADDR_HIGH);
906 #endif
907
908     print_vmcs_field(VMCS_ENTRY_INT_INFO);
909     print_vmcs_field(VMCS_ENTRY_EXCP_ERR);
910     print_vmcs_field(VMCS_ENTRY_INSTR_LEN);
911
912
913 }
914
915
916 static void print_exit_info() {
917     PrintDebug("VMCS_EXIT_INFO\n");
918
919     print_vmcs_field(VMCS_EXIT_REASON);
920     print_vmcs_field(VMCS_EXIT_QUAL);
921
922     print_vmcs_field(VMCS_EXIT_INT_INFO);
923     print_vmcs_field(VMCS_EXIT_INT_ERR);
924
925     print_vmcs_field(VMCS_IDT_VECTOR_INFO);
926     print_vmcs_field(VMCS_IDT_VECTOR_ERR);
927
928     print_vmcs_field(VMCS_EXIT_INSTR_LEN);
929
930     print_vmcs_field(VMCS_GUEST_LINEAR_ADDR);
931     print_vmcs_field(VMCS_EXIT_INSTR_INFO);
932
933     print_vmcs_field(VMCS_IO_RCX);
934     print_vmcs_field(VMCS_IO_RSI);
935     print_vmcs_field(VMCS_IO_RDI);
936     print_vmcs_field(VMCS_IO_RIP);
937
938
939     print_vmcs_field(VMCS_INSTR_ERR);
940 }
941
942 void v3_print_vmcs() {
943
944     print_vmcs_field(VMCS_LINK_PTR);
945 #ifdef __V3_32BIT__
946     print_vmcs_field(VMCS_LINK_PTR_HIGH);
947 #endif
948
949     print_guest_state();
950     print_host_state();
951
952     print_ept_state();
953
954     print_exec_ctrls();
955     print_exit_ctrls();
956     print_entry_ctrls();
957     print_exit_info();
958
959 }
960
961
962 /*
963  * Returns the field length in bytes
964  *   It doesn't get much uglier than this... Thanks Intel
965  */
966 int v3_vmcs_get_field_len(vmcs_field_t field) {
967     struct vmcs_field_encoding * enc = (struct vmcs_field_encoding *)&field;
968
969     switch (enc->width)  {
970         case 0:
971             return 2;
972         case 1: {
973             if (enc->access_type == 1) {
974                 return 4;
975             } else {
976                 return sizeof(addr_t);
977             }
978         }
979         case 2:
980             return 4;
981         case 3:
982             return sizeof(addr_t);
983         default:
984             PrintError("Invalid VMCS field: 0x%x\n", field);
985             return -1;
986     }
987 }
988
989
990
991
992
993
994
995
996
997
998
999 static const char VMCS_VPID_STR[] = "VPID";
1000 static const char VMCS_GUEST_ES_SELECTOR_STR[] = "GUEST_ES_SELECTOR";
1001 static const char VMCS_GUEST_CS_SELECTOR_STR[] = "GUEST_CS_SELECTOR";
1002 static const char VMCS_GUEST_SS_SELECTOR_STR[] = "GUEST_SS_SELECTOR";
1003 static const char VMCS_GUEST_DS_SELECTOR_STR[] = "GUEST_DS_SELECTOR";
1004 static const char VMCS_GUEST_FS_SELECTOR_STR[] = "GUEST_FS_SELECTOR";
1005 static const char VMCS_GUEST_GS_SELECTOR_STR[] = "GUEST_GS_SELECTOR";
1006 static const char VMCS_GUEST_LDTR_SELECTOR_STR[] = "GUEST_LDTR_SELECTOR";
1007 static const char VMCS_GUEST_TR_SELECTOR_STR[] = "GUEST_TR_SELECTOR";
1008 static const char VMCS_HOST_ES_SELECTOR_STR[] = "HOST_ES_SELECTOR";
1009 static const char VMCS_HOST_CS_SELECTOR_STR[] = "HOST_CS_SELECTOR";
1010 static const char VMCS_HOST_SS_SELECTOR_STR[] = "HOST_SS_SELECTOR";
1011 static const char VMCS_HOST_DS_SELECTOR_STR[] = "HOST_DS_SELECTOR";
1012 static const char VMCS_HOST_FS_SELECTOR_STR[] = "HOST_FS_SELECTOR";
1013 static const char VMCS_HOST_GS_SELECTOR_STR[] = "HOST_GS_SELECTOR";
1014 static const char VMCS_HOST_TR_SELECTOR_STR[] = "HOST_TR_SELECTOR";
1015 static const char VMCS_IO_BITMAP_A_ADDR_STR[] = "IO_BITMAP_A_ADDR";
1016 static const char VMCS_IO_BITMAP_A_ADDR_HIGH_STR[] = "IO_BITMAP_A_ADDR_HIGH";
1017 static const char VMCS_IO_BITMAP_B_ADDR_STR[] = "IO_BITMAP_B_ADDR";
1018 static const char VMCS_IO_BITMAP_B_ADDR_HIGH_STR[] = "IO_BITMAP_B_ADDR_HIGH";
1019 static const char VMCS_MSR_BITMAP_STR[] = "MSR_BITMAPS";
1020 static const char VMCS_MSR_BITMAP_HIGH_STR[] = "MSR_BITMAPS_HIGH";
1021 static const char VMCS_EXIT_MSR_STORE_ADDR_STR[] = "EXIT_MSR_STORE_ADDR";
1022 static const char VMCS_EXIT_MSR_STORE_ADDR_HIGH_STR[] = "EXIT_MSR_STORE_ADDR_HIGH";
1023 static const char VMCS_EXIT_MSR_LOAD_ADDR_STR[] = "EXIT_MSR_LOAD_ADDR";
1024 static const char VMCS_EXIT_MSR_LOAD_ADDR_HIGH_STR[] = "EXIT_MSR_LOAD_ADDR_HIGH";
1025 static const char VMCS_ENTRY_MSR_LOAD_ADDR_STR[] = "ENTRY_MSR_LOAD_ADDR";
1026 static const char VMCS_ENTRY_MSR_LOAD_ADDR_HIGH_STR[] = "ENTRY_MSR_LOAD_ADDR_HIGH";
1027 static const char VMCS_EXEC_PTR_STR[] = "VMCS_EXEC_PTR";
1028 static const char VMCS_EXEC_PTR_HIGH_STR[] = "VMCS_EXEC_PTR_HIGH";
1029 static const char VMCS_TSC_OFFSET_STR[] = "TSC_OFFSET";
1030 static const char VMCS_TSC_OFFSET_HIGH_STR[] = "TSC_OFFSET_HIGH";
1031 static const char VMCS_VAPIC_ADDR_STR[] = "VAPIC_PAGE_ADDR";
1032 static const char VMCS_VAPIC_ADDR_HIGH_STR[] = "VAPIC_PAGE_ADDR_HIGH";
1033 static const char VMCS_APIC_ACCESS_ADDR_STR[] = "APIC_ACCESS_ADDR";
1034 static const char VMCS_APIC_ACCESS_ADDR_HIGH_STR[] = "APIC_ACCESS_ADDR_HIGH";
1035 static const char VMCS_EPT_PTR_STR[] = "VMCS_EPT_PTR";
1036 static const char VMCS_EPT_PTR_HIGH_STR[] = "VMCS_EPT_PTR_HIGH";
1037 static const char VMCS_GUEST_PHYS_ADDR_STR[] = "VMCS_GUEST_PHYS_ADDR";
1038 static const char VMCS_GUEST_PHYS_ADDR_HIGH_STR[] = "VMCS_GUEST_PHYS_ADDR_HIGH";
1039 static const char VMCS_LINK_PTR_STR[] = "VMCS_LINK_PTR";
1040 static const char VMCS_LINK_PTR_HIGH_STR[] = "VMCS_LINK_PTR_HIGH";
1041 static const char VMCS_GUEST_DBG_CTL_STR[] = "GUEST_DEBUG_CTL";
1042 static const char VMCS_GUEST_DBG_CTL_HIGH_STR[] = "GUEST_DEBUG_CTL_HIGH";
1043 static const char VMCS_GUEST_PAT_STR[] = "GUEST_PAT";
1044 static const char VMCS_GUEST_PAT_HIGH_STR[] = "GUEST_PAT_HIGH";
1045 static const char VMCS_GUEST_EFER_STR[] = "GUEST_EFER";
1046 static const char VMCS_GUEST_EFER_HIGH_STR[] = "GUEST_EFER_HIGH";
1047 static const char VMCS_GUEST_PERF_GLOBAL_CTRL_STR[] = "GUEST_PERF_GLOBAL_CTRL";
1048 static const char VMCS_GUEST_PERF_GLOBAL_CTRL_HIGH_STR[] = "GUEST_PERF_GLOBAL_CTRL_HIGH";
1049 static const char VMCS_GUEST_PDPTE0_STR[] = "GUEST_PDPTE0";
1050 static const char VMCS_GUEST_PDPTE0_HIGH_STR[] = "GUEST_PDPTE0_HIGH";
1051 static const char VMCS_GUEST_PDPTE1_STR[] = "GUEST_PDPTE1";
1052 static const char VMCS_GUEST_PDPTE1_HIGH_STR[] = "GUEST_PDPTE1_HIGH";
1053 static const char VMCS_GUEST_PDPTE2_STR[] = "GUEST_PDPTE2";
1054 static const char VMCS_GUEST_PDPTE2_HIGH_STR[] = "GUEST_PDPTE2_HIGH";
1055 static const char VMCS_GUEST_PDPTE3_STR[] = "GUEST_PDPTE3";
1056 static const char VMCS_GUEST_PDPTE3_HIGH_STR[] = "GUEST_PDPTE3_HIGH";
1057 static const char VMCS_HOST_PAT_STR[] = "HOST_PAT";
1058 static const char VMCS_HOST_PAT_HIGH_STR[] = "HOST_PAT_HIGH";
1059 static const char VMCS_HOST_EFER_STR[] = "VMCS_HOST_EFER";
1060 static const char VMCS_HOST_EFER_HIGH_STR[] = "VMCS_HOST_EFER_HIGH";
1061 static const char VMCS_HOST_PERF_GLOBAL_CTRL_STR[] = "HOST_PERF_GLOBAL_CTRL";
1062 static const char VMCS_HOST_PERF_GLOBAL_CTRL_HIGH_STR[] = "HOST_PERF_GLOBAL_CTRL_HIGH";
1063 static const char VMCS_PIN_CTRLS_STR[] = "PIN_VM_EXEC_CTRLS";
1064 static const char VMCS_PROC_CTRLS_STR[] = "PROC_VM_EXEC_CTRLS";
1065 static const char VMCS_EXCP_BITMAP_STR[] = "EXCEPTION_BITMAP";
1066 static const char VMCS_PG_FAULT_ERR_MASK_STR[] = "PAGE_FAULT_ERROR_MASK";
1067 static const char VMCS_PG_FAULT_ERR_MATCH_STR[] = "PAGE_FAULT_ERROR_MATCH";
1068 static const char VMCS_CR3_TGT_CNT_STR[] = "CR3_TARGET_COUNT";
1069 static const char VMCS_EXIT_CTRLS_STR[] = "VM_EXIT_CTRLS";
1070 static const char VMCS_EXIT_MSR_STORE_CNT_STR[] = "VM_EXIT_MSR_STORE_COUNT";
1071 static const char VMCS_EXIT_MSR_LOAD_CNT_STR[] = "VM_EXIT_MSR_LOAD_COUNT";
1072 static const char VMCS_ENTRY_CTRLS_STR[] = "VM_ENTRY_CTRLS";
1073 static const char VMCS_ENTRY_MSR_LOAD_CNT_STR[] = "VM_ENTRY_MSR_LOAD_COUNT";
1074 static const char VMCS_ENTRY_INT_INFO_STR[] = "VM_ENTRY_INT_INFO_FIELD";
1075 static const char VMCS_ENTRY_EXCP_ERR_STR[] = "VM_ENTRY_EXCEPTION_ERROR";
1076 static const char VMCS_ENTRY_INSTR_LEN_STR[] = "VM_ENTRY_INSTR_LENGTH";
1077 static const char VMCS_TPR_THRESHOLD_STR[] = "TPR_THRESHOLD";
1078 static const char VMCS_SEC_PROC_CTRLS_STR[] = "VMCS_SEC_PROC_CTRLS";
1079 static const char VMCS_PLE_GAP_STR[] = "PLE_GAP";
1080 static const char VMCS_PLE_WINDOW_STR[] = "PLE_WINDOW";
1081 static const char VMCS_INSTR_ERR_STR[] = "VM_INSTR_ERROR";
1082 static const char VMCS_EXIT_REASON_STR[] = "EXIT_REASON";
1083 static const char VMCS_EXIT_INT_INFO_STR[] = "VM_EXIT_INT_INFO";
1084 static const char VMCS_EXIT_INT_ERR_STR[] = "VM_EXIT_INT_ERROR";
1085 static const char VMCS_IDT_VECTOR_INFO_STR[] = "IDT_VECTOR_INFO";
1086 static const char VMCS_IDT_VECTOR_ERR_STR[] = "IDT_VECTOR_ERROR";
1087 static const char VMCS_EXIT_INSTR_LEN_STR[] = "VM_EXIT_INSTR_LENGTH";
1088 static const char VMCS_EXIT_INSTR_INFO_STR[] = "VMX_INSTR_INFO";
1089 static const char VMCS_GUEST_ES_LIMIT_STR[] = "GUEST_ES_LIMIT";
1090 static const char VMCS_GUEST_CS_LIMIT_STR[] = "GUEST_CS_LIMIT";
1091 static const char VMCS_GUEST_SS_LIMIT_STR[] = "GUEST_SS_LIMIT";
1092 static const char VMCS_GUEST_DS_LIMIT_STR[] = "GUEST_DS_LIMIT";
1093 static const char VMCS_GUEST_FS_LIMIT_STR[] = "GUEST_FS_LIMIT";
1094 static const char VMCS_GUEST_GS_LIMIT_STR[] = "GUEST_GS_LIMIT";
1095 static const char VMCS_GUEST_LDTR_LIMIT_STR[] = "GUEST_LDTR_LIMIT";
1096 static const char VMCS_GUEST_TR_LIMIT_STR[] = "GUEST_TR_LIMIT";
1097 static const char VMCS_GUEST_GDTR_LIMIT_STR[] = "GUEST_GDTR_LIMIT";
1098 static const char VMCS_GUEST_IDTR_LIMIT_STR[] = "GUEST_IDTR_LIMIT";
1099 static const char VMCS_GUEST_ES_ACCESS_STR[] = "GUEST_ES_ACCESS";
1100 static const char VMCS_GUEST_CS_ACCESS_STR[] = "GUEST_CS_ACCESS";
1101 static const char VMCS_GUEST_SS_ACCESS_STR[] = "GUEST_SS_ACCESS";
1102 static const char VMCS_GUEST_DS_ACCESS_STR[] = "GUEST_DS_ACCESS";
1103 static const char VMCS_GUEST_FS_ACCESS_STR[] = "GUEST_FS_ACCESS";
1104 static const char VMCS_GUEST_GS_ACCESS_STR[] = "GUEST_GS_ACCESS";
1105 static const char VMCS_GUEST_LDTR_ACCESS_STR[] = "GUEST_LDTR_ACCESS";
1106 static const char VMCS_GUEST_TR_ACCESS_STR[] = "GUEST_TR_ACCESS";
1107 static const char VMCS_GUEST_INT_STATE_STR[] = "GUEST_INT_STATE";
1108 static const char VMCS_GUEST_ACTIVITY_STATE_STR[] = "GUEST_ACTIVITY_STATE";
1109 static const char VMCS_GUEST_SMBASE_STR[] = "GUEST_SMBASE";
1110 static const char VMCS_GUEST_SYSENTER_CS_STR[] = "GUEST_SYSENTER_CS";
1111 static const char VMCS_PREEMPT_TIMER_STR[] = "PREEMPT_TIMER";
1112 static const char VMCS_HOST_SYSENTER_CS_STR[] = "HOST_SYSENTER_CS";
1113 static const char VMCS_CR0_MASK_STR[] = "CR0_GUEST_HOST_MASK";
1114 static const char VMCS_CR4_MASK_STR[] = "CR4_GUEST_HOST_MASK";
1115 static const char VMCS_CR0_READ_SHDW_STR[] = "CR0_READ_SHADOW";
1116 static const char VMCS_CR4_READ_SHDW_STR[] = "CR4_READ_SHADOW";
1117 static const char VMCS_CR3_TGT_VAL_0_STR[] = "CR3_TARGET_VALUE_0";
1118 static const char VMCS_CR3_TGT_VAL_1_STR[] = "CR3_TARGET_VALUE_1";
1119 static const char VMCS_CR3_TGT_VAL_2_STR[] = "CR3_TARGET_VALUE_2";
1120 static const char VMCS_CR3_TGT_VAL_3_STR[] = "CR3_TARGET_VALUE_3";
1121 static const char VMCS_EXIT_QUAL_STR[] = "EXIT_QUALIFICATION";
1122 static const char VMCS_IO_RCX_STR[] = "IO_RCX";
1123 static const char VMCS_IO_RSI_STR[] = "IO_RSI";
1124 static const char VMCS_IO_RDI_STR[] = "IO_RDI";
1125 static const char VMCS_IO_RIP_STR[] = "IO_RIP";
1126 static const char VMCS_GUEST_LINEAR_ADDR_STR[] = "GUEST_LINEAR_ADDR";
1127 static const char VMCS_GUEST_CR0_STR[] = "GUEST_CR0";
1128 static const char VMCS_GUEST_CR3_STR[] = "GUEST_CR3";
1129 static const char VMCS_GUEST_CR4_STR[] = "GUEST_CR4";
1130 static const char VMCS_GUEST_ES_BASE_STR[] = "GUEST_ES_BASE";
1131 static const char VMCS_GUEST_CS_BASE_STR[] = "GUEST_CS_BASE";
1132 static const char VMCS_GUEST_SS_BASE_STR[] = "GUEST_SS_BASE";
1133 static const char VMCS_GUEST_DS_BASE_STR[] = "GUEST_DS_BASE";
1134 static const char VMCS_GUEST_FS_BASE_STR[] = "GUEST_FS_BASE";
1135 static const char VMCS_GUEST_GS_BASE_STR[] = "GUEST_GS_BASE";
1136 static const char VMCS_GUEST_LDTR_BASE_STR[] = "GUEST_LDTR_BASE";
1137 static const char VMCS_GUEST_TR_BASE_STR[] = "GUEST_TR_BASE";
1138 static const char VMCS_GUEST_GDTR_BASE_STR[] = "GUEST_GDTR_BASE";
1139 static const char VMCS_GUEST_IDTR_BASE_STR[] = "GUEST_IDTR_BASE";
1140 static const char VMCS_GUEST_DR7_STR[] = "GUEST_DR7";
1141 static const char VMCS_GUEST_RSP_STR[] = "GUEST_RSP";
1142 static const char VMCS_GUEST_RIP_STR[] = "GUEST_RIP";
1143 static const char VMCS_GUEST_RFLAGS_STR[] = "GUEST_RFLAGS";
1144 static const char VMCS_GUEST_PENDING_DBG_EXCP_STR[] = "GUEST_PENDING_DEBUG_EXCS";
1145 static const char VMCS_GUEST_SYSENTER_ESP_STR[] = "GUEST_SYSENTER_ESP";
1146 static const char VMCS_GUEST_SYSENTER_EIP_STR[] = "GUEST_SYSENTER_EIP";
1147 static const char VMCS_HOST_CR0_STR[] = "HOST_CR0";
1148 static const char VMCS_HOST_CR3_STR[] = "HOST_CR3";
1149 static const char VMCS_HOST_CR4_STR[] = "HOST_CR4";
1150 static const char VMCS_HOST_FS_BASE_STR[] = "HOST_FS_BASE";
1151 static const char VMCS_HOST_GS_BASE_STR[] = "HOST_GS_BASE";
1152 static const char VMCS_HOST_TR_BASE_STR[] = "HOST_TR_BASE";
1153 static const char VMCS_HOST_GDTR_BASE_STR[] = "HOST_GDTR_BASE";
1154 static const char VMCS_HOST_IDTR_BASE_STR[] = "HOST_IDTR_BASE";
1155 static const char VMCS_HOST_SYSENTER_ESP_STR[] = "HOST_SYSENTER_ESP";
1156 static const char VMCS_HOST_SYSENTER_EIP_STR[] = "HOST_SYSENTER_EIP";
1157 static const char VMCS_HOST_RSP_STR[] = "HOST_RSP";
1158 static const char VMCS_HOST_RIP_STR[] = "HOST_RIP";
1159
1160
1161
1162 const char * v3_vmcs_field_to_str(vmcs_field_t field) {   
1163     switch (field) {
1164         case VMCS_VPID:
1165             return VMCS_VPID_STR;
1166         case VMCS_GUEST_ES_SELECTOR:
1167             return VMCS_GUEST_ES_SELECTOR_STR;
1168         case VMCS_GUEST_CS_SELECTOR:
1169             return VMCS_GUEST_CS_SELECTOR_STR;
1170         case VMCS_GUEST_SS_SELECTOR:
1171             return VMCS_GUEST_SS_SELECTOR_STR;
1172         case VMCS_GUEST_DS_SELECTOR:
1173             return VMCS_GUEST_DS_SELECTOR_STR;
1174         case VMCS_GUEST_FS_SELECTOR:
1175             return VMCS_GUEST_FS_SELECTOR_STR;
1176         case VMCS_GUEST_GS_SELECTOR:
1177             return VMCS_GUEST_GS_SELECTOR_STR;
1178         case VMCS_GUEST_LDTR_SELECTOR:
1179             return VMCS_GUEST_LDTR_SELECTOR_STR;
1180         case VMCS_GUEST_TR_SELECTOR:
1181             return VMCS_GUEST_TR_SELECTOR_STR;
1182         case VMCS_HOST_ES_SELECTOR:
1183             return VMCS_HOST_ES_SELECTOR_STR;
1184         case VMCS_HOST_CS_SELECTOR:
1185             return VMCS_HOST_CS_SELECTOR_STR;
1186         case VMCS_HOST_SS_SELECTOR:
1187             return VMCS_HOST_SS_SELECTOR_STR;
1188         case VMCS_HOST_DS_SELECTOR:
1189             return VMCS_HOST_DS_SELECTOR_STR;
1190         case VMCS_HOST_FS_SELECTOR:
1191             return VMCS_HOST_FS_SELECTOR_STR;
1192         case VMCS_HOST_GS_SELECTOR:
1193             return VMCS_HOST_GS_SELECTOR_STR;
1194         case VMCS_HOST_TR_SELECTOR:
1195             return VMCS_HOST_TR_SELECTOR_STR;
1196         case VMCS_IO_BITMAP_A_ADDR:
1197             return VMCS_IO_BITMAP_A_ADDR_STR;
1198         case VMCS_IO_BITMAP_A_ADDR_HIGH:
1199             return VMCS_IO_BITMAP_A_ADDR_HIGH_STR;
1200         case VMCS_IO_BITMAP_B_ADDR:
1201             return VMCS_IO_BITMAP_B_ADDR_STR;
1202         case VMCS_IO_BITMAP_B_ADDR_HIGH:
1203             return VMCS_IO_BITMAP_B_ADDR_HIGH_STR;
1204         case VMCS_MSR_BITMAP:
1205             return VMCS_MSR_BITMAP_STR;
1206         case VMCS_MSR_BITMAP_HIGH:
1207             return VMCS_MSR_BITMAP_HIGH_STR;
1208         case VMCS_EXIT_MSR_STORE_ADDR:
1209             return VMCS_EXIT_MSR_STORE_ADDR_STR;
1210         case VMCS_EXIT_MSR_STORE_ADDR_HIGH:
1211             return VMCS_EXIT_MSR_STORE_ADDR_HIGH_STR;
1212         case VMCS_EXIT_MSR_LOAD_ADDR:
1213             return VMCS_EXIT_MSR_LOAD_ADDR_STR;
1214         case VMCS_EXIT_MSR_LOAD_ADDR_HIGH:
1215             return VMCS_EXIT_MSR_LOAD_ADDR_HIGH_STR;
1216         case VMCS_ENTRY_MSR_LOAD_ADDR:
1217             return VMCS_ENTRY_MSR_LOAD_ADDR_STR;
1218         case VMCS_ENTRY_MSR_LOAD_ADDR_HIGH:
1219             return VMCS_ENTRY_MSR_LOAD_ADDR_HIGH_STR;
1220         case VMCS_EXEC_PTR:
1221             return VMCS_EXEC_PTR_STR;
1222         case VMCS_EXEC_PTR_HIGH:
1223             return VMCS_EXEC_PTR_HIGH_STR;
1224         case VMCS_TSC_OFFSET:
1225             return VMCS_TSC_OFFSET_STR;
1226         case VMCS_TSC_OFFSET_HIGH:
1227             return VMCS_TSC_OFFSET_HIGH_STR;
1228         case VMCS_VAPIC_ADDR:
1229             return VMCS_VAPIC_ADDR_STR;
1230         case VMCS_VAPIC_ADDR_HIGH:
1231             return VMCS_VAPIC_ADDR_HIGH_STR;
1232         case VMCS_APIC_ACCESS_ADDR:
1233             return VMCS_APIC_ACCESS_ADDR_STR;
1234         case VMCS_APIC_ACCESS_ADDR_HIGH:
1235             return VMCS_APIC_ACCESS_ADDR_HIGH_STR;
1236         case VMCS_EPT_PTR:
1237             return VMCS_EPT_PTR_STR;
1238         case VMCS_EPT_PTR_HIGH:
1239             return VMCS_EPT_PTR_HIGH_STR;
1240         case VMCS_GUEST_PHYS_ADDR:
1241             return VMCS_GUEST_PHYS_ADDR_STR;
1242         case VMCS_GUEST_PHYS_ADDR_HIGH:
1243             return VMCS_GUEST_PHYS_ADDR_HIGH_STR;
1244         case VMCS_LINK_PTR:
1245             return VMCS_LINK_PTR_STR;
1246         case VMCS_LINK_PTR_HIGH:
1247             return VMCS_LINK_PTR_HIGH_STR;
1248         case VMCS_GUEST_DBG_CTL:
1249             return VMCS_GUEST_DBG_CTL_STR;
1250         case VMCS_GUEST_DBG_CTL_HIGH:
1251             return VMCS_GUEST_DBG_CTL_HIGH_STR;
1252         case VMCS_GUEST_PAT:
1253             return VMCS_GUEST_PAT_STR;
1254         case VMCS_GUEST_PAT_HIGH:
1255             return VMCS_GUEST_PAT_HIGH_STR;
1256         case VMCS_GUEST_EFER:
1257             return VMCS_GUEST_EFER_STR;
1258         case VMCS_GUEST_EFER_HIGH:
1259             return VMCS_GUEST_EFER_HIGH_STR;
1260         case VMCS_GUEST_PERF_GLOBAL_CTRL:
1261             return VMCS_GUEST_PERF_GLOBAL_CTRL_STR;
1262         case VMCS_GUEST_PERF_GLOBAL_CTRL_HIGH:
1263             return VMCS_GUEST_PERF_GLOBAL_CTRL_HIGH_STR;
1264         case VMCS_GUEST_PDPTE0:
1265             return VMCS_GUEST_PDPTE0_STR;
1266         case VMCS_GUEST_PDPTE0_HIGH:
1267             return VMCS_GUEST_PDPTE0_HIGH_STR;
1268         case VMCS_GUEST_PDPTE1:
1269             return VMCS_GUEST_PDPTE1_STR;
1270         case VMCS_GUEST_PDPTE1_HIGH:
1271             return VMCS_GUEST_PDPTE1_HIGH_STR;
1272         case VMCS_GUEST_PDPTE2:
1273             return VMCS_GUEST_PDPTE2_STR;
1274         case VMCS_GUEST_PDPTE2_HIGH:
1275             return VMCS_GUEST_PDPTE2_HIGH_STR;
1276         case VMCS_GUEST_PDPTE3:
1277             return VMCS_GUEST_PDPTE3_STR;
1278         case VMCS_GUEST_PDPTE3_HIGH:
1279             return VMCS_GUEST_PDPTE3_HIGH_STR;
1280         case VMCS_HOST_PAT:
1281             return VMCS_HOST_PAT_STR;
1282         case VMCS_HOST_PAT_HIGH:
1283             return VMCS_HOST_PAT_HIGH_STR;
1284         case VMCS_HOST_EFER:
1285             return VMCS_HOST_EFER_STR;
1286         case VMCS_HOST_EFER_HIGH:
1287             return VMCS_HOST_EFER_HIGH_STR;
1288         case VMCS_HOST_PERF_GLOBAL_CTRL:
1289             return VMCS_HOST_PERF_GLOBAL_CTRL_STR;
1290         case VMCS_HOST_PERF_GLOBAL_CTRL_HIGH:
1291             return VMCS_HOST_PERF_GLOBAL_CTRL_HIGH_STR;
1292         case VMCS_PIN_CTRLS:
1293             return VMCS_PIN_CTRLS_STR;
1294         case VMCS_PROC_CTRLS:
1295             return VMCS_PROC_CTRLS_STR;
1296         case VMCS_EXCP_BITMAP:
1297             return VMCS_EXCP_BITMAP_STR;
1298         case VMCS_PG_FAULT_ERR_MASK:
1299             return VMCS_PG_FAULT_ERR_MASK_STR;
1300         case VMCS_PG_FAULT_ERR_MATCH:
1301             return VMCS_PG_FAULT_ERR_MATCH_STR;
1302         case VMCS_CR3_TGT_CNT:
1303             return VMCS_CR3_TGT_CNT_STR;
1304         case VMCS_EXIT_CTRLS:
1305             return VMCS_EXIT_CTRLS_STR;
1306         case VMCS_EXIT_MSR_STORE_CNT:
1307             return VMCS_EXIT_MSR_STORE_CNT_STR;
1308         case VMCS_EXIT_MSR_LOAD_CNT:
1309             return VMCS_EXIT_MSR_LOAD_CNT_STR;
1310         case VMCS_ENTRY_CTRLS:
1311             return VMCS_ENTRY_CTRLS_STR;
1312         case VMCS_ENTRY_MSR_LOAD_CNT:
1313             return VMCS_ENTRY_MSR_LOAD_CNT_STR;
1314         case VMCS_ENTRY_INT_INFO:
1315             return VMCS_ENTRY_INT_INFO_STR;
1316         case VMCS_ENTRY_EXCP_ERR:
1317             return VMCS_ENTRY_EXCP_ERR_STR;
1318         case VMCS_ENTRY_INSTR_LEN:
1319             return VMCS_ENTRY_INSTR_LEN_STR;
1320         case VMCS_TPR_THRESHOLD:
1321             return VMCS_TPR_THRESHOLD_STR;
1322         case VMCS_SEC_PROC_CTRLS:
1323             return VMCS_SEC_PROC_CTRLS_STR;
1324         case VMCS_PLE_GAP:
1325             return VMCS_PLE_GAP_STR;
1326         case VMCS_PLE_WINDOW:
1327             return VMCS_PLE_WINDOW_STR;
1328         case VMCS_INSTR_ERR:
1329             return VMCS_INSTR_ERR_STR;
1330         case VMCS_EXIT_REASON:
1331             return VMCS_EXIT_REASON_STR;
1332         case VMCS_EXIT_INT_INFO:
1333             return VMCS_EXIT_INT_INFO_STR;
1334         case VMCS_EXIT_INT_ERR:
1335             return VMCS_EXIT_INT_ERR_STR;
1336         case VMCS_IDT_VECTOR_INFO:
1337             return VMCS_IDT_VECTOR_INFO_STR;
1338         case VMCS_IDT_VECTOR_ERR:
1339             return VMCS_IDT_VECTOR_ERR_STR;
1340         case VMCS_EXIT_INSTR_LEN:
1341             return VMCS_EXIT_INSTR_LEN_STR;
1342         case VMCS_EXIT_INSTR_INFO:
1343             return VMCS_EXIT_INSTR_INFO_STR;
1344         case VMCS_GUEST_ES_LIMIT:
1345             return VMCS_GUEST_ES_LIMIT_STR;
1346         case VMCS_GUEST_CS_LIMIT:
1347             return VMCS_GUEST_CS_LIMIT_STR;
1348         case VMCS_GUEST_SS_LIMIT:
1349             return VMCS_GUEST_SS_LIMIT_STR;
1350         case VMCS_GUEST_DS_LIMIT:
1351             return VMCS_GUEST_DS_LIMIT_STR;
1352         case VMCS_GUEST_FS_LIMIT:
1353             return VMCS_GUEST_FS_LIMIT_STR;
1354         case VMCS_GUEST_GS_LIMIT:
1355             return VMCS_GUEST_GS_LIMIT_STR;
1356         case VMCS_GUEST_LDTR_LIMIT:
1357             return VMCS_GUEST_LDTR_LIMIT_STR;
1358         case VMCS_GUEST_TR_LIMIT:
1359             return VMCS_GUEST_TR_LIMIT_STR;
1360         case VMCS_GUEST_GDTR_LIMIT:
1361             return VMCS_GUEST_GDTR_LIMIT_STR;
1362         case VMCS_GUEST_IDTR_LIMIT:
1363             return VMCS_GUEST_IDTR_LIMIT_STR;
1364         case VMCS_GUEST_ES_ACCESS:
1365             return VMCS_GUEST_ES_ACCESS_STR;
1366         case VMCS_GUEST_CS_ACCESS:
1367             return VMCS_GUEST_CS_ACCESS_STR;
1368         case VMCS_GUEST_SS_ACCESS:
1369             return VMCS_GUEST_SS_ACCESS_STR;
1370         case VMCS_GUEST_DS_ACCESS:
1371             return VMCS_GUEST_DS_ACCESS_STR;
1372         case VMCS_GUEST_FS_ACCESS:
1373             return VMCS_GUEST_FS_ACCESS_STR;
1374         case VMCS_GUEST_GS_ACCESS:
1375             return VMCS_GUEST_GS_ACCESS_STR;
1376         case VMCS_GUEST_LDTR_ACCESS:
1377             return VMCS_GUEST_LDTR_ACCESS_STR;
1378         case VMCS_GUEST_TR_ACCESS:
1379             return VMCS_GUEST_TR_ACCESS_STR;
1380         case VMCS_GUEST_INT_STATE:
1381             return VMCS_GUEST_INT_STATE_STR;
1382         case VMCS_GUEST_ACTIVITY_STATE:
1383             return VMCS_GUEST_ACTIVITY_STATE_STR;
1384         case VMCS_GUEST_SMBASE:
1385             return VMCS_GUEST_SMBASE_STR;
1386         case VMCS_GUEST_SYSENTER_CS:
1387             return VMCS_GUEST_SYSENTER_CS_STR;
1388         case VMCS_PREEMPT_TIMER:
1389             return VMCS_PREEMPT_TIMER_STR;
1390         case VMCS_HOST_SYSENTER_CS:         
1391             return VMCS_HOST_SYSENTER_CS_STR;
1392         case VMCS_CR0_MASK:
1393             return VMCS_CR0_MASK_STR;
1394         case VMCS_CR4_MASK:
1395             return VMCS_CR4_MASK_STR;
1396         case VMCS_CR0_READ_SHDW:
1397             return VMCS_CR0_READ_SHDW_STR;
1398         case VMCS_CR4_READ_SHDW:
1399             return VMCS_CR4_READ_SHDW_STR;
1400         case VMCS_CR3_TGT_VAL_0:
1401             return VMCS_CR3_TGT_VAL_0_STR;
1402         case VMCS_CR3_TGT_VAL_1:
1403             return VMCS_CR3_TGT_VAL_1_STR;
1404         case VMCS_CR3_TGT_VAL_2:
1405             return VMCS_CR3_TGT_VAL_2_STR;
1406         case VMCS_CR3_TGT_VAL_3:
1407             return VMCS_CR3_TGT_VAL_3_STR;
1408         case VMCS_EXIT_QUAL:
1409             return VMCS_EXIT_QUAL_STR;
1410         case VMCS_IO_RCX:
1411             return VMCS_IO_RCX_STR;
1412         case VMCS_IO_RSI:
1413             return VMCS_IO_RSI_STR;
1414         case VMCS_IO_RDI:
1415             return VMCS_IO_RDI_STR;
1416         case VMCS_IO_RIP:
1417             return VMCS_IO_RIP_STR;
1418         case VMCS_GUEST_LINEAR_ADDR:
1419             return VMCS_GUEST_LINEAR_ADDR_STR;
1420         case VMCS_GUEST_CR0:
1421             return VMCS_GUEST_CR0_STR;
1422         case VMCS_GUEST_CR3:
1423             return VMCS_GUEST_CR3_STR;
1424         case VMCS_GUEST_CR4:
1425             return VMCS_GUEST_CR4_STR;
1426         case VMCS_GUEST_ES_BASE:
1427             return VMCS_GUEST_ES_BASE_STR;
1428         case VMCS_GUEST_CS_BASE:
1429             return VMCS_GUEST_CS_BASE_STR;
1430         case VMCS_GUEST_SS_BASE:
1431             return VMCS_GUEST_SS_BASE_STR;
1432         case VMCS_GUEST_DS_BASE:
1433             return VMCS_GUEST_DS_BASE_STR;
1434         case VMCS_GUEST_FS_BASE:
1435             return VMCS_GUEST_FS_BASE_STR;
1436         case VMCS_GUEST_GS_BASE:
1437             return VMCS_GUEST_GS_BASE_STR;
1438         case VMCS_GUEST_LDTR_BASE:
1439             return VMCS_GUEST_LDTR_BASE_STR;
1440         case VMCS_GUEST_TR_BASE:
1441             return VMCS_GUEST_TR_BASE_STR;
1442         case VMCS_GUEST_GDTR_BASE:
1443             return VMCS_GUEST_GDTR_BASE_STR;
1444         case VMCS_GUEST_IDTR_BASE:
1445             return VMCS_GUEST_IDTR_BASE_STR;
1446         case VMCS_GUEST_DR7:
1447             return VMCS_GUEST_DR7_STR;
1448         case VMCS_GUEST_RSP:
1449             return VMCS_GUEST_RSP_STR;
1450         case VMCS_GUEST_RIP:
1451             return VMCS_GUEST_RIP_STR;
1452         case VMCS_GUEST_RFLAGS:
1453             return VMCS_GUEST_RFLAGS_STR;
1454         case VMCS_GUEST_PENDING_DBG_EXCP:
1455             return VMCS_GUEST_PENDING_DBG_EXCP_STR;
1456         case VMCS_GUEST_SYSENTER_ESP:
1457             return VMCS_GUEST_SYSENTER_ESP_STR;
1458         case VMCS_GUEST_SYSENTER_EIP:
1459             return VMCS_GUEST_SYSENTER_EIP_STR;
1460         case VMCS_HOST_CR0:
1461             return VMCS_HOST_CR0_STR;
1462         case VMCS_HOST_CR3:
1463             return VMCS_HOST_CR3_STR;
1464         case VMCS_HOST_CR4:
1465             return VMCS_HOST_CR4_STR;
1466         case VMCS_HOST_FS_BASE:
1467             return VMCS_HOST_FS_BASE_STR;
1468         case VMCS_HOST_GS_BASE:
1469             return VMCS_HOST_GS_BASE_STR;
1470         case VMCS_HOST_TR_BASE:
1471             return VMCS_HOST_TR_BASE_STR;
1472         case VMCS_HOST_GDTR_BASE:
1473             return VMCS_HOST_GDTR_BASE_STR;
1474         case VMCS_HOST_IDTR_BASE:
1475             return VMCS_HOST_IDTR_BASE_STR;
1476         case VMCS_HOST_SYSENTER_ESP:
1477             return VMCS_HOST_SYSENTER_ESP_STR;
1478         case VMCS_HOST_SYSENTER_EIP:
1479             return VMCS_HOST_SYSENTER_EIP_STR;
1480         case VMCS_HOST_RSP:
1481             return VMCS_HOST_RSP_STR;
1482         case VMCS_HOST_RIP:
1483             return VMCS_HOST_RIP_STR;
1484         default:
1485             return NULL;
1486     }
1487 }
1488
1489
1490