2 * This file is part of the Palacios Virtual Machine Monitor developed
3 * by the V3VEE Project with funding from the United States National
4 * Science Foundation and the Department of Energy.
6 * The V3VEE Project is a joint project between Northwestern University
7 * and the University of New Mexico. You can find out more at
10 * Copyright (c) 2008, Jack Lange <jarusl@cs.northwestern.edu>
11 * Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org>
12 * All rights reserved.
14 * Author: Jack Lange <jarusl@cs.northwestern.edu>
16 * This is free software. You are permitted to use,
17 * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
21 #include <palacios/svm_io.h>
22 #include <palacios/vmm_io.h>
23 #include <palacios/vmm_ctrl_regs.h>
24 #include <palacios/vmm_decoder.h>
25 #include <palacios/vm_guest_mem.h>
27 #ifndef V3_CONFIG_DEBUG_IO
29 #define PrintDebug(fmt, args...)
33 static int update_map(struct v3_vm_info * vm, uint16_t port, int hook_read, int hook_write) {
34 uchar_t * bitmap = (uint8_t *)(vm->io_map.arch_data);;
38 if ((hook_read == 0) && (hook_write == 0)) {
39 *(bitmap + major) &= ~(0x1 << minor);
41 *(bitmap + major) |= (0x1 << minor);
48 int v3_init_svm_io_map(struct v3_vm_info * vm) {
51 vm->io_map.update_map = update_map;
53 temp = V3_AllocPages(3);
56 PrintError("Cannot allocate io bitmap\n");
60 vm->io_map.arch_data = V3_VAddr(temp);
62 memset(vm->io_map.arch_data, 0xff, PAGE_SIZE_4KB * 3);
65 v3_refresh_io_map(vm);
70 int v3_deinit_svm_io_map(struct v3_vm_info * vm) {
71 V3_FreePages(V3_PAddr(vm->io_map.arch_data), 3);
77 // This should package up an IO request and call vmm_handle_io
78 int v3_handle_svm_io_in(struct guest_info * core, struct svm_io_info * io_info) {
79 struct v3_io_hook * hook = v3_get_io_hook(core->vm_info, io_info->port);
84 } else if (io_info->sz16) {
86 } else if (io_info->sz32) {
90 PrintDebug("IN of %d bytes on port %d (0x%x)\n", read_size, io_info->port, io_info->port);
93 PrintDebug("IN operation on unhooked IO port 0x%x - returning zero\n", io_info->port);
94 core->vm_regs.rax >>= 8*read_size;
95 core->vm_regs.rax <<= 8*read_size;
98 if (hook->read(core, io_info->port, &(core->vm_regs.rax), read_size, hook->priv_data) != read_size) {
99 // not sure how we handle errors.....
100 PrintError("Read Failure for in on port 0x%x\n", io_info->port);
113 /* We might not handle wrap around of the RDI register correctly...
114 * In that if we do wrap around the effect will manifest in the higher bits of the register
116 int v3_handle_svm_io_ins(struct guest_info * core, struct svm_io_info * io_info) {
117 struct v3_io_hook * hook = v3_get_io_hook(core->vm_info, io_info->port);
122 struct v3_segment * theseg = &(core->segments.es); // default is ES
126 // This is kind of hacky...
127 // direction can equal either 1 or -1
128 // We will multiply the final added offset by this value to go the correct direction
130 struct rflags * flags = (struct rflags *)&(core->ctrl_regs.rflags);
137 if (v3_gva_to_hva(core, get_addr_linear(core, core->rip, &(core->segments.cs)), &inst_ptr) == -1) {
138 PrintError("Can't access instruction\n");
142 while (is_prefix_byte(*((char *)inst_ptr))) {
143 switch (*((char *)inst_ptr)) {
144 case PREFIX_CS_OVERRIDE:
145 theseg = &(core->segments.cs);
147 case PREFIX_SS_OVERRIDE:
148 theseg = &(core->segments.ss);
150 case PREFIX_DS_OVERRIDE:
151 theseg = &(core->segments.ds);
153 case PREFIX_ES_OVERRIDE:
154 theseg = &(core->segments.es);
156 case PREFIX_FS_OVERRIDE:
157 theseg = &(core->segments.fs);
159 case PREFIX_GS_OVERRIDE:
160 theseg = &(core->segments.gs);
169 PrintDebug("INS on port %d (0x%x)\n", io_info->port, io_info->port);
173 } else if (io_info->sz16) {
175 } else if (io_info->sz32) {
178 PrintError("io_info Invalid Size\n");
183 if (io_info->addr16) {
185 } else if (io_info->addr32) {
187 } else if (io_info->addr64) {
188 mask = 0xffffffffffffffffLL;
190 // This value should be set depending on the host register size...
191 mask = get_gpr_mask(core);
193 PrintDebug("INS io_info invalid address size, mask=0x%p, io_info=0x%p\n",
194 (void *)(addr_t)mask, (void *)(addr_t)(io_info));
195 // PrintDebug("INS Aborted... Check implementation\n");
200 rep_num = core->vm_regs.rcx & mask;
201 //rep_num = info->vm_regs.rcx;
204 PrintDebug("INS size=%d for %d steps\n", read_size, rep_num);
206 while (rep_num > 0) {
208 dst_addr = get_addr_linear(core, (core->vm_regs.rdi & mask), theseg);
210 // PrintDebug("Writing 0x%p\n", (void *)dst_addr);
212 if (v3_gva_to_hva(core, dst_addr, &host_addr) == -1) {
213 // either page fault or gpf...
214 PrintError("Could not convert Guest VA to host VA\n");
219 PrintDebug("INS operation on unhooked IO port 0x%x - returning zeros\n", io_info->port);
220 memset((char*)host_addr,0,read_size);
223 if (hook->read(core, io_info->port, (char *)host_addr, read_size, hook->priv_data) != read_size) {
224 // not sure how we handle errors.....
225 PrintError("Read Failure for ins on port 0x%x\n", io_info->port);
230 core->vm_regs.rdi += (read_size * direction);
242 int v3_handle_svm_io_out(struct guest_info * core, struct svm_io_info * io_info) {
243 struct v3_io_hook * hook = v3_get_io_hook(core->vm_info, io_info->port);
248 } else if (io_info->sz16) {
250 } else if (io_info->sz32) {
254 PrintDebug("OUT of %d bytes on port %d (0x%x)\n", write_size, io_info->port, io_info->port);
257 PrintDebug("OUT operation on unhooked IO port 0x%x - ignored\n", io_info->port);
259 if (hook->write(core, io_info->port, &(core->vm_regs.rax), write_size, hook->priv_data) != write_size) {
260 // not sure how we handle errors.....
261 PrintError("Write Failure for out on port 0x%x\n", io_info->port);
271 /* We might not handle wrap around of the RSI register correctly...
272 * In that if we do wrap around the effect will manifest in the higher bits of the register
275 int v3_handle_svm_io_outs(struct guest_info * core, struct svm_io_info * io_info) {
277 struct v3_io_hook * hook = v3_get_io_hook(core->vm_info, io_info->port);
283 struct v3_segment * theseg = &(core->segments.ds); // default is DS
285 // This is kind of hacky...
286 // direction can equal either 1 or -1
287 // We will multiply the final added offset by this value to go the correct direction
289 struct rflags * flags = (struct rflags *)&(core->ctrl_regs.rflags);
295 PrintDebug("OUTS on port %d (0x%x)\n", io_info->port, io_info->port);
299 } else if (io_info->sz16) {
301 } else if (io_info->sz32) {
306 if (io_info->addr16) {
308 } else if (io_info->addr32) {
310 } else if (io_info->addr64) {
311 mask = 0xffffffffffffffffLL;
313 // This value should be set depending on the host register size...
314 mask = get_gpr_mask(core);
316 PrintDebug("OUTS io_info invalid address size, mask=0%p, io_info=0x%p\n",
317 (void *)(addr_t)mask, (void *)(addr_t)io_info);
318 // PrintDebug("INS Aborted... Check implementation\n");
320 // should never happen
321 //PrintDebug("Invalid Address length\n");
326 rep_num = core->vm_regs.rcx & mask;
332 if (v3_gva_to_hva(core, get_addr_linear(core, core->rip, &(core->segments.cs)), &inst_ptr) == -1) {
333 PrintError("Can't access instruction\n");
337 while (is_prefix_byte(*((char *)inst_ptr))) {
338 switch (*((char *)inst_ptr)) {
339 case PREFIX_CS_OVERRIDE:
340 theseg = &(core->segments.cs);
342 case PREFIX_SS_OVERRIDE:
343 theseg = &(core->segments.ss);
345 case PREFIX_DS_OVERRIDE:
346 theseg = &(core->segments.ds);
348 case PREFIX_ES_OVERRIDE:
349 theseg = &(core->segments.es);
351 case PREFIX_FS_OVERRIDE:
352 theseg = &(core->segments.fs);
354 case PREFIX_GS_OVERRIDE:
355 theseg = &(core->segments.gs);
363 PrintDebug("OUTS size=%d for %d steps\n", write_size, rep_num);
365 while (rep_num > 0) {
366 addr_t host_addr = 0;
368 dst_addr = get_addr_linear(core, (core->vm_regs.rsi & mask), theseg);
370 if (v3_gva_to_hva(core, dst_addr, &host_addr) == -1) {
371 PrintError("Could not translate outs dest addr, either page fault or gpf...\n");
376 PrintDebug("OUTS operation on unhooked IO port 0x%x - ignored\n", io_info->port);
378 if (hook->write(core, io_info->port, (char*)host_addr, write_size, hook->priv_data) != write_size) {
379 // not sure how we handle errors.....
380 PrintError("Write Failure for outs on port 0x%x\n", io_info->port);
386 core->vm_regs.rsi += write_size * direction;