3 * This file is part of the Palacios Virtual Machine Monitor developed
4 * by the V3VEE Project with funding from the United States National
5 * Science Foundation and the Department of Energy.
7 * The V3VEE Project is a joint project between Northwestern University
8 * and the University of New Mexico. You can find out more at
11 * Copyright (c) 2008, Jack Lange <jarusl@cs.northwestern.edu>
12 * Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org>
13 * All rights reserved.
15 * Author: Jack Lange <jarusl@cs.northwestern.edu>
17 * This is free software. You are permitted to use,
18 * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
22 #include <palacios/svm.h>
23 #include <palacios/vmm.h>
25 #include <palacios/vmcb.h>
26 #include <palacios/vmm_mem.h>
27 #include <palacios/vmm_paging.h>
28 #include <palacios/svm_handler.h>
30 #include <palacios/vmm_debug.h>
31 #include <palacios/vm_guest_mem.h>
33 #include <palacios/vmm_decoder.h>
34 #include <palacios/vmm_string.h>
35 #include <palacios/vmm_lowlevel.h>
36 #include <palacios/svm_msr.h>
38 #include <palacios/vmm_rbtree.h>
40 #include <palacios/vmm_direct_paging.h>
42 #include <palacios/vmm_ctrl_regs.h>
43 #include <palacios/svm_io.h>
45 #include <palacios/vmm_sprintf.h>
48 #ifndef V3_CONFIG_DEBUG_SVM
50 #define PrintDebug(fmt, args...)
54 uint32_t v3_last_exit;
56 // This is a global pointer to the host's VMCB
57 static addr_t host_vmcbs[V3_CONFIG_MAX_CPUS] = { [0 ... V3_CONFIG_MAX_CPUS - 1] = 0};
61 extern void v3_stgi();
62 extern void v3_clgi();
63 //extern int v3_svm_launch(vmcb_t * vmcb, struct v3_gprs * vm_regs, uint64_t * fs, uint64_t * gs);
64 extern int v3_svm_launch(vmcb_t * vmcb, struct v3_gprs * vm_regs, vmcb_t * host_vmcb);
67 static vmcb_t * Allocate_VMCB() {
68 vmcb_t * vmcb_page = NULL;
69 addr_t vmcb_pa = (addr_t)V3_AllocPages(1);
71 if ((void *)vmcb_pa == NULL) {
72 PrintError("Error allocating VMCB\n");
76 vmcb_page = (vmcb_t *)V3_VAddr((void *)vmcb_pa);
78 memset(vmcb_page, 0, 4096);
84 static int v3_svm_handle_efer_write(struct guest_info * core, uint_t msr, struct v3_msr src, void * priv_data)
88 // Call arch-independent handler
89 if ((status = v3_handle_efer_write(core, msr, src, priv_data)) != 0)
93 if (core->shdw_pg_mode == NESTED_PAGING) {
94 // Ensure that hardware visible EFER.SVME bit is set (SVM Enable)
95 struct efer_64 * hw_efer = (struct efer_64 *)&(core->ctrl_regs.efer);
103 static void Init_VMCB_BIOS(vmcb_t * vmcb, struct guest_info * core) {
104 vmcb_ctrl_t * ctrl_area = GET_VMCB_CTRL_AREA(vmcb);
105 vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA(vmcb);
110 ctrl_area->svm_instrs.VMRUN = 1;
111 ctrl_area->svm_instrs.VMMCALL = 1;
112 ctrl_area->svm_instrs.VMLOAD = 1;
113 ctrl_area->svm_instrs.VMSAVE = 1;
114 ctrl_area->svm_instrs.STGI = 1;
115 ctrl_area->svm_instrs.CLGI = 1;
116 ctrl_area->svm_instrs.SKINIT = 1;
117 ctrl_area->svm_instrs.ICEBP = 1;
118 ctrl_area->svm_instrs.WBINVD = 1;
119 ctrl_area->svm_instrs.MONITOR = 1;
120 ctrl_area->svm_instrs.MWAIT_always = 1;
121 ctrl_area->svm_instrs.MWAIT_if_armed = 1;
122 ctrl_area->instrs.INVLPGA = 1;
123 ctrl_area->instrs.CPUID = 1;
125 ctrl_area->instrs.HLT = 1;
127 #ifdef V3_CONFIG_TIME_VIRTUALIZE_TSC
128 ctrl_area->instrs.RDTSC = 1;
129 ctrl_area->svm_instrs.RDTSCP = 1;
132 // guest_state->cr0 = 0x00000001; // PE
135 ctrl_area->exceptions.de = 1;
136 ctrl_area->exceptions.df = 1;
138 ctrl_area->exceptions.ts = 1;
139 ctrl_area->exceptions.ss = 1;
140 ctrl_area->exceptions.ac = 1;
141 ctrl_area->exceptions.mc = 1;
142 ctrl_area->exceptions.gp = 1;
143 ctrl_area->exceptions.ud = 1;
144 ctrl_area->exceptions.np = 1;
145 ctrl_area->exceptions.of = 1;
147 ctrl_area->exceptions.nmi = 1;
151 ctrl_area->instrs.NMI = 1;
152 ctrl_area->instrs.SMI = 0; // allow SMIs to run in guest
153 ctrl_area->instrs.INIT = 1;
154 ctrl_area->instrs.PAUSE = 1;
155 ctrl_area->instrs.shutdown_evts = 1;
158 /* DEBUG FOR RETURN CODE */
159 ctrl_area->exit_code = 1;
162 /* Setup Guest Machine state */
164 core->vm_regs.rsp = 0x00;
167 core->vm_regs.rdx = 0x00000f00;
172 core->ctrl_regs.rflags = 0x00000002; // The reserved bit is always 1
173 core->ctrl_regs.cr0 = 0x60010010; // Set the WP flag so the memory hooks work in real-mode
174 core->ctrl_regs.efer |= EFER_MSR_svm_enable;
180 core->segments.cs.selector = 0xf000;
181 core->segments.cs.limit = 0xffff;
182 core->segments.cs.base = 0x0000000f0000LL;
184 // (raw attributes = 0xf3)
185 core->segments.cs.type = 0x3;
186 core->segments.cs.system = 0x1;
187 core->segments.cs.dpl = 0x3;
188 core->segments.cs.present = 1;
192 struct v3_segment * segregs [] = {&(core->segments.ss), &(core->segments.ds),
193 &(core->segments.es), &(core->segments.fs),
194 &(core->segments.gs), NULL};
196 for ( i = 0; segregs[i] != NULL; i++) {
197 struct v3_segment * seg = segregs[i];
199 seg->selector = 0x0000;
200 // seg->base = seg->selector << 4;
201 seg->base = 0x00000000;
204 // (raw attributes = 0xf3)
211 core->segments.gdtr.limit = 0x0000ffff;
212 core->segments.gdtr.base = 0x0000000000000000LL;
213 core->segments.idtr.limit = 0x0000ffff;
214 core->segments.idtr.base = 0x0000000000000000LL;
216 core->segments.ldtr.selector = 0x0000;
217 core->segments.ldtr.limit = 0x0000ffff;
218 core->segments.ldtr.base = 0x0000000000000000LL;
219 core->segments.tr.selector = 0x0000;
220 core->segments.tr.limit = 0x0000ffff;
221 core->segments.tr.base = 0x0000000000000000LL;
224 core->dbg_regs.dr6 = 0x00000000ffff0ff0LL;
225 core->dbg_regs.dr7 = 0x0000000000000400LL;
228 ctrl_area->IOPM_BASE_PA = (addr_t)V3_PAddr(core->vm_info->io_map.arch_data);
229 ctrl_area->instrs.IOIO_PROT = 1;
231 ctrl_area->MSRPM_BASE_PA = (addr_t)V3_PAddr(core->vm_info->msr_map.arch_data);
232 ctrl_area->instrs.MSR_PROT = 1;
235 PrintDebug("Exiting on interrupts\n");
236 ctrl_area->guest_ctrl.V_INTR_MASKING = 1;
237 ctrl_area->instrs.INTR = 1;
240 v3_hook_msr(core->vm_info, EFER_MSR,
241 &v3_handle_efer_read,
242 &v3_svm_handle_efer_write,
245 if (core->shdw_pg_mode == SHADOW_PAGING) {
246 PrintDebug("Creating initial shadow page table\n");
248 /* JRL: This is a performance killer, and a simplistic solution */
249 /* We need to fix this */
250 ctrl_area->TLB_CONTROL = 1;
251 ctrl_area->guest_ASID = 1;
254 if (v3_init_passthrough_pts(core) == -1) {
255 PrintError("Could not initialize passthrough page tables\n");
260 core->shdw_pg_state.guest_cr0 = 0x0000000000000010LL;
261 PrintDebug("Created\n");
263 core->ctrl_regs.cr0 |= 0x80000000;
264 core->ctrl_regs.cr3 = core->direct_map_pt;
266 ctrl_area->cr_reads.cr0 = 1;
267 ctrl_area->cr_writes.cr0 = 1;
268 //ctrl_area->cr_reads.cr4 = 1;
269 ctrl_area->cr_writes.cr4 = 1;
270 ctrl_area->cr_reads.cr3 = 1;
271 ctrl_area->cr_writes.cr3 = 1;
275 ctrl_area->instrs.INVLPG = 1;
277 ctrl_area->exceptions.pf = 1;
279 guest_state->g_pat = 0x7040600070406ULL;
283 } else if (core->shdw_pg_mode == NESTED_PAGING) {
284 // Flush the TLB on entries/exits
285 ctrl_area->TLB_CONTROL = 1;
286 ctrl_area->guest_ASID = 1;
288 // Enable Nested Paging
289 ctrl_area->NP_ENABLE = 1;
291 PrintDebug("NP_Enable at 0x%p\n", (void *)&(ctrl_area->NP_ENABLE));
293 // Set the Nested Page Table pointer
294 if (v3_init_passthrough_pts(core) == -1) {
295 PrintError("Could not initialize Nested page tables\n");
299 ctrl_area->N_CR3 = core->direct_map_pt;
301 guest_state->g_pat = 0x7040600070406ULL;
304 /* tell the guest that we don't support SVM */
305 v3_hook_msr(core->vm_info, SVM_VM_CR_MSR,
306 &v3_handle_vm_cr_read,
307 &v3_handle_vm_cr_write,
312 int v3_init_svm_vmcb(struct guest_info * core, v3_vm_class_t vm_class) {
314 PrintDebug("Allocating VMCB\n");
315 core->vmm_data = (void *)Allocate_VMCB();
317 if (core->vmm_data == NULL) {
318 PrintError("Could not allocate VMCB, Exiting...\n");
322 if (vm_class == V3_PC_VM) {
323 PrintDebug("Initializing VMCB (addr=%p)\n", (void *)core->vmm_data);
324 Init_VMCB_BIOS((vmcb_t*)(core->vmm_data), core);
326 PrintError("Invalid VM class\n");
334 int v3_deinit_svm_vmcb(struct guest_info * core) {
335 V3_FreePages(V3_PAddr(core->vmm_data), 1);
340 static int update_irq_exit_state(struct guest_info * info) {
341 vmcb_ctrl_t * guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data));
343 // Fix for QEMU bug using EVENTINJ as an internal cache
344 guest_ctrl->EVENTINJ.valid = 0;
346 if ((info->intr_core_state.irq_pending == 1) && (guest_ctrl->guest_ctrl.V_IRQ == 0)) {
348 #ifdef V3_CONFIG_DEBUG_INTERRUPTS
349 PrintDebug("INTAK cycle completed for irq %d\n", info->intr_core_state.irq_vector);
352 info->intr_core_state.irq_started = 1;
353 info->intr_core_state.irq_pending = 0;
355 v3_injecting_intr(info, info->intr_core_state.irq_vector, V3_EXTERNAL_IRQ);
358 if ((info->intr_core_state.irq_started == 1) && (guest_ctrl->exit_int_info.valid == 0)) {
359 #ifdef V3_CONFIG_DEBUG_INTERRUPTS
360 PrintDebug("Interrupt %d taken by guest\n", info->intr_core_state.irq_vector);
363 // Interrupt was taken fully vectored
364 info->intr_core_state.irq_started = 0;
366 } else if ((info->intr_core_state.irq_started == 1) && (guest_ctrl->exit_int_info.valid == 1)) {
367 #ifdef V3_CONFIG_DEBUG_INTERRUPTS
368 PrintDebug("EXIT INT INFO is set (vec=%d)\n", guest_ctrl->exit_int_info.vector);
376 static int update_irq_entry_state(struct guest_info * info) {
377 vmcb_ctrl_t * guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data));
380 if (info->intr_core_state.irq_pending == 0) {
381 guest_ctrl->guest_ctrl.V_IRQ = 0;
382 guest_ctrl->guest_ctrl.V_INTR_VECTOR = 0;
385 if (v3_excp_pending(info)) {
386 uint_t excp = v3_get_excp_number(info);
388 guest_ctrl->EVENTINJ.type = SVM_INJECTION_EXCEPTION;
390 if (info->excp_state.excp_error_code_valid) {
391 guest_ctrl->EVENTINJ.error_code = info->excp_state.excp_error_code;
392 guest_ctrl->EVENTINJ.ev = 1;
393 #ifdef V3_CONFIG_DEBUG_INTERRUPTS
394 PrintDebug("Injecting exception %d with error code %x\n", excp, guest_ctrl->EVENTINJ.error_code);
398 guest_ctrl->EVENTINJ.vector = excp;
400 guest_ctrl->EVENTINJ.valid = 1;
402 #ifdef V3_CONFIG_DEBUG_INTERRUPTS
403 PrintDebug("<%d> Injecting Exception %d (CR2=%p) (EIP=%p)\n",
404 (int)info->num_exits,
405 guest_ctrl->EVENTINJ.vector,
406 (void *)(addr_t)info->ctrl_regs.cr2,
407 (void *)(addr_t)info->rip);
410 v3_injecting_excp(info, excp);
411 } else if (info->intr_core_state.irq_started == 1) {
412 #ifdef V3_CONFIG_DEBUG_INTERRUPTS
413 PrintDebug("IRQ pending from previous injection\n");
415 guest_ctrl->guest_ctrl.V_IRQ = 1;
416 guest_ctrl->guest_ctrl.V_INTR_VECTOR = info->intr_core_state.irq_vector;
417 guest_ctrl->guest_ctrl.V_IGN_TPR = 1;
418 guest_ctrl->guest_ctrl.V_INTR_PRIO = 0xf;
421 switch (v3_intr_pending(info)) {
422 case V3_EXTERNAL_IRQ: {
423 uint32_t irq = v3_get_intr(info);
425 guest_ctrl->guest_ctrl.V_IRQ = 1;
426 guest_ctrl->guest_ctrl.V_INTR_VECTOR = irq;
427 guest_ctrl->guest_ctrl.V_IGN_TPR = 1;
428 guest_ctrl->guest_ctrl.V_INTR_PRIO = 0xf;
430 #ifdef V3_CONFIG_DEBUG_INTERRUPTS
431 PrintDebug("Injecting Interrupt %d (EIP=%p)\n",
432 guest_ctrl->guest_ctrl.V_INTR_VECTOR,
433 (void *)(addr_t)info->rip);
436 info->intr_core_state.irq_pending = 1;
437 info->intr_core_state.irq_vector = irq;
442 guest_ctrl->EVENTINJ.type = SVM_INJECTION_NMI;
444 case V3_SOFTWARE_INTR:
445 guest_ctrl->EVENTINJ.type = SVM_INJECTION_SOFT_INTR;
447 #ifdef V3_CONFIG_DEBUG_INTERRUPTS
448 PrintDebug("Injecting software interrupt -- type: %d, vector: %d\n",
449 SVM_INJECTION_SOFT_INTR, info->intr_core_state.swintr_vector);
451 guest_ctrl->EVENTINJ.vector = info->intr_core_state.swintr_vector;
452 guest_ctrl->EVENTINJ.valid = 1;
454 /* reset swintr state */
455 info->intr_core_state.swintr_posted = 0;
456 info->intr_core_state.swintr_vector = 0;
460 guest_ctrl->EVENTINJ.type = SVM_INJECTION_IRQ;
463 case V3_INVALID_INTR:
475 * CAUTION and DANGER!!!
477 * The VMCB CANNOT(!!) be accessed outside of the clgi/stgi calls inside this function
478 * When exectuing a symbiotic call, the VMCB WILL be overwritten, so any dependencies
479 * on its contents will cause things to break. The contents at the time of the exit WILL
480 * change before the exit handler is executed.
482 int v3_svm_enter(struct guest_info * info) {
483 vmcb_ctrl_t * guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data));
484 vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA((vmcb_t*)(info->vmm_data));
485 addr_t exit_code = 0, exit_info1 = 0, exit_info2 = 0;
487 // Conditionally yield the CPU if the timeslice has expired
490 // Perform any additional yielding needed for time adjustment
491 v3_adjust_time(info);
493 // disable global interrupts for vm state transition
496 // Update timer devices after being in the VM, with interupts
497 // disabled, but before doing IRQ updates, so that any interrupts they
498 //raise get seen immediately.
499 v3_update_timers(info);
501 // Synchronize the guest state to the VMCB
502 guest_state->cr0 = info->ctrl_regs.cr0;
503 guest_state->cr2 = info->ctrl_regs.cr2;
504 guest_state->cr3 = info->ctrl_regs.cr3;
505 guest_state->cr4 = info->ctrl_regs.cr4;
506 guest_state->dr6 = info->dbg_regs.dr6;
507 guest_state->dr7 = info->dbg_regs.dr7;
508 guest_ctrl->guest_ctrl.V_TPR = info->ctrl_regs.cr8 & 0xff;
509 guest_state->rflags = info->ctrl_regs.rflags;
510 guest_state->efer = info->ctrl_regs.efer;
512 guest_state->cpl = info->cpl;
514 v3_set_vmcb_segments((vmcb_t*)(info->vmm_data), &(info->segments));
516 guest_state->rax = info->vm_regs.rax;
517 guest_state->rip = info->rip;
518 guest_state->rsp = info->vm_regs.rsp;
520 #ifdef V3_CONFIG_SYMCALL
521 if (info->sym_core_state.symcall_state.sym_call_active == 0) {
522 update_irq_entry_state(info);
525 update_irq_entry_state(info);
532 PrintDebug("SVM Entry to CS=%p rip=%p...\n",
533 (void *)(addr_t)info->segments.cs.base,
534 (void *)(addr_t)info->rip);
537 #ifdef V3_CONFIG_SYMCALL
538 if (info->sym_core_state.symcall_state.sym_call_active == 1) {
539 if (guest_ctrl->guest_ctrl.V_IRQ == 1) {
540 V3_Print("!!! Injecting Interrupt during Sym call !!!\n");
545 v3_time_enter_vm(info);
546 guest_ctrl->TSC_OFFSET = v3_tsc_host_offset(&info->time_state);
548 //V3_Print("Calling v3_svm_launch\n");
550 v3_svm_launch((vmcb_t *)V3_PAddr(info->vmm_data), &(info->vm_regs), (vmcb_t *)host_vmcbs[V3_Get_CPU()]);
552 //V3_Print("SVM Returned: Exit Code: %x, guest_rip=%lx\n", (uint32_t)(guest_ctrl->exit_code), (unsigned long)guest_state->rip);
554 v3_last_exit = (uint32_t)(guest_ctrl->exit_code);
556 // Immediate exit from VM time bookkeeping
557 v3_time_exit_vm(info);
561 // Save Guest state from VMCB
562 info->rip = guest_state->rip;
563 info->vm_regs.rsp = guest_state->rsp;
564 info->vm_regs.rax = guest_state->rax;
566 info->cpl = guest_state->cpl;
568 info->ctrl_regs.cr0 = guest_state->cr0;
569 info->ctrl_regs.cr2 = guest_state->cr2;
570 info->ctrl_regs.cr3 = guest_state->cr3;
571 info->ctrl_regs.cr4 = guest_state->cr4;
572 info->dbg_regs.dr6 = guest_state->dr6;
573 info->dbg_regs.dr7 = guest_state->dr7;
574 info->ctrl_regs.cr8 = guest_ctrl->guest_ctrl.V_TPR;
575 info->ctrl_regs.rflags = guest_state->rflags;
576 info->ctrl_regs.efer = guest_state->efer;
578 v3_get_vmcb_segments((vmcb_t*)(info->vmm_data), &(info->segments));
579 info->cpu_mode = v3_get_vm_cpu_mode(info);
580 info->mem_mode = v3_get_vm_mem_mode(info);
583 // save exit info here
584 exit_code = guest_ctrl->exit_code;
585 exit_info1 = guest_ctrl->exit_info1;
586 exit_info2 = guest_ctrl->exit_info2;
588 #ifdef V3_CONFIG_SYMCALL
589 if (info->sym_core_state.symcall_state.sym_call_active == 0) {
590 update_irq_exit_state(info);
593 update_irq_exit_state(info);
596 // reenable global interrupts after vm exit
599 // Conditionally yield the CPU if the timeslice has expired
603 int ret = v3_handle_svm_exit(info, exit_code, exit_info1, exit_info2);
606 PrintError("Error in SVM exit handler (ret=%d)\n", ret);
607 PrintError(" last Exit was %d (exit code=0x%llx)\n", v3_last_exit, (uint64_t) exit_code);
617 int v3_start_svm_guest(struct guest_info * info) {
618 // vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA((vmcb_t*)(info->vmm_data));
619 // vmcb_ctrl_t * guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data));
621 PrintDebug("Starting SVM core %u (on logical core %u)\n", info->vcpu_id, info->pcpu_id);
623 if (info->vcpu_id == 0) {
624 info->core_run_state = CORE_RUNNING;
625 info->vm_info->run_state = VM_RUNNING;
627 PrintDebug("SVM core %u (on %u): Waiting for core initialization\n", info->vcpu_id, info->pcpu_id);
629 while (info->core_run_state == CORE_STOPPED) {
631 //PrintDebug("SVM core %u: still waiting for INIT\n", info->vcpu_id);
634 PrintDebug("SVM core %u(on %u) initialized\n", info->vcpu_id, info->pcpu_id);
637 PrintDebug("SVM core %u(on %u): I am starting at CS=0x%x (base=0x%p, limit=0x%x), RIP=0x%p\n",
638 info->vcpu_id, info->pcpu_id,
639 info->segments.cs.selector, (void *)(info->segments.cs.base),
640 info->segments.cs.limit, (void *)(info->rip));
644 PrintDebug("SVM core %u: Launching SVM VM (vmcb=%p) (on cpu %u)\n",
645 info->vcpu_id, (void *)info->vmm_data, info->pcpu_id);
646 //PrintDebugVMCB((vmcb_t*)(info->vmm_data));
652 if (info->vm_info->run_state == VM_STOPPED) {
653 info->core_run_state = CORE_STOPPED;
657 if (v3_svm_enter(info) == -1) {
658 vmcb_ctrl_t * guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data));
660 addr_t linear_addr = 0;
662 info->vm_info->run_state = VM_ERROR;
664 V3_Print("SVM core %u: SVM ERROR!!\n", info->vcpu_id);
666 v3_print_guest_state(info);
668 V3_Print("SVM core %u: SVM Exit Code: %p\n", info->vcpu_id, (void *)(addr_t)guest_ctrl->exit_code);
670 V3_Print("SVM core %u: exit_info1 low = 0x%.8x\n", info->vcpu_id, *(uint_t*)&(guest_ctrl->exit_info1));
671 V3_Print("SVM core %u: exit_info1 high = 0x%.8x\n", info->vcpu_id, *(uint_t *)(((uchar_t *)&(guest_ctrl->exit_info1)) + 4));
673 V3_Print("SVM core %u: exit_info2 low = 0x%.8x\n", info->vcpu_id, *(uint_t*)&(guest_ctrl->exit_info2));
674 V3_Print("SVM core %u: exit_info2 high = 0x%.8x\n", info->vcpu_id, *(uint_t *)(((uchar_t *)&(guest_ctrl->exit_info2)) + 4));
676 linear_addr = get_addr_linear(info, info->rip, &(info->segments.cs));
678 if (info->mem_mode == PHYSICAL_MEM) {
679 v3_gpa_to_hva(info, linear_addr, &host_addr);
680 } else if (info->mem_mode == VIRTUAL_MEM) {
681 v3_gva_to_hva(info, linear_addr, &host_addr);
684 V3_Print("SVM core %u: Host Address of rip = 0x%p\n", info->vcpu_id, (void *)host_addr);
686 V3_Print("SVM core %u: Instr (15 bytes) at %p:\n", info->vcpu_id, (void *)host_addr);
687 v3_dump_mem((uint8_t *)host_addr, 15);
689 v3_print_stack(info);
695 if (info->vm_info->run_state == VM_STOPPED) {
696 info->core_run_state = CORE_STOPPED;
703 if ((info->num_exits % 50000) == 0) {
704 V3_Print("SVM Exit number %d\n", (uint32_t)info->num_exits);
705 v3_print_guest_state(info);
711 // Need to take down the other cores on error...
719 int v3_reset_svm_vm_core(struct guest_info * core, addr_t rip) {
722 // Write the RIP, CS, and descriptor
723 // assume the rest is already good to go
725 // vector VV -> rip at 0
727 // This means we start executing at linear address VV000
729 // So the selector needs to be VV00
730 // and the base needs to be VV000
733 core->segments.cs.selector = rip << 8;
734 core->segments.cs.limit = 0xffff;
735 core->segments.cs.base = rip << 12;
745 /* Checks machine SVM capability */
746 /* Implemented from: AMD Arch Manual 3, sect 15.4 */
747 int v3_is_svm_capable() {
748 uint_t vm_cr_low = 0, vm_cr_high = 0;
749 uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0;
751 v3_cpuid(CPUID_EXT_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
753 PrintDebug("CPUID_EXT_FEATURE_IDS_ecx=0x%x\n", ecx);
755 if ((ecx & CPUID_EXT_FEATURE_IDS_ecx_svm_avail) == 0) {
756 V3_Print("SVM Not Available\n");
759 v3_get_msr(SVM_VM_CR_MSR, &vm_cr_high, &vm_cr_low);
761 PrintDebug("SVM_VM_CR_MSR = 0x%x 0x%x\n", vm_cr_high, vm_cr_low);
763 if ((vm_cr_low & SVM_VM_CR_MSR_svmdis) == 1) {
764 V3_Print("SVM is available but is disabled.\n");
766 v3_cpuid(CPUID_SVM_REV_AND_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
768 PrintDebug("CPUID_SVM_REV_AND_FEATURE_IDS_edx=0x%x\n", edx);
770 if ((edx & CPUID_SVM_REV_AND_FEATURE_IDS_edx_svml) == 0) {
771 V3_Print("SVM BIOS Disabled, not unlockable\n");
773 V3_Print("SVM is locked with a key\n");
778 V3_Print("SVM is available and enabled.\n");
780 v3_cpuid(CPUID_SVM_REV_AND_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
781 PrintDebug("CPUID_SVM_REV_AND_FEATURE_IDS_eax=0x%x\n", eax);
782 PrintDebug("CPUID_SVM_REV_AND_FEATURE_IDS_ebx=0x%x\n", ebx);
783 PrintDebug("CPUID_SVM_REV_AND_FEATURE_IDS_ecx=0x%x\n", ecx);
784 PrintDebug("CPUID_SVM_REV_AND_FEATURE_IDS_edx=0x%x\n", edx);
791 static int has_svm_nested_paging() {
792 uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0;
794 v3_cpuid(CPUID_SVM_REV_AND_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
796 //PrintDebug("CPUID_EXT_FEATURE_IDS_edx=0x%x\n", edx);
798 if ((edx & CPUID_SVM_REV_AND_FEATURE_IDS_edx_np) == 0) {
799 V3_Print("SVM Nested Paging not supported\n");
802 V3_Print("SVM Nested Paging supported\n");
809 void v3_init_svm_cpu(int cpu_id) {
811 extern v3_cpu_arch_t v3_cpu_types[];
813 // Enable SVM on the CPU
814 v3_get_msr(EFER_MSR, &(msr.e_reg.high), &(msr.e_reg.low));
815 msr.e_reg.low |= EFER_MSR_svm_enable;
816 v3_set_msr(EFER_MSR, 0, msr.e_reg.low);
818 V3_Print("SVM Enabled\n");
820 // Setup the host state save area
821 host_vmcbs[cpu_id] = (addr_t)V3_AllocPages(4);
824 // msr.e_reg.high = 0;
825 //msr.e_reg.low = (uint_t)host_vmcb;
826 msr.r_reg = host_vmcbs[cpu_id];
828 PrintDebug("Host State being saved at %p\n", (void *)host_vmcbs[cpu_id]);
829 v3_set_msr(SVM_VM_HSAVE_PA_MSR, msr.e_reg.high, msr.e_reg.low);
832 if (has_svm_nested_paging() == 1) {
833 v3_cpu_types[cpu_id] = V3_SVM_REV3_CPU;
835 v3_cpu_types[cpu_id] = V3_SVM_CPU;
841 void v3_deinit_svm_cpu(int cpu_id) {
843 extern v3_cpu_arch_t v3_cpu_types[];
845 // reset SVM_VM_HSAVE_PA_MSR
846 // Does setting it to NULL disable??
848 v3_set_msr(SVM_VM_HSAVE_PA_MSR, msr.e_reg.high, msr.e_reg.low);
851 v3_get_msr(EFER_MSR, &(msr.e_reg.high), &(msr.e_reg.low));
852 msr.e_reg.low &= ~EFER_MSR_svm_enable;
853 v3_set_msr(EFER_MSR, 0, msr.e_reg.low);
855 v3_cpu_types[cpu_id] = V3_INVALID_CPU;
857 V3_FreePages((void *)host_vmcbs[cpu_id], 4);
859 V3_Print("Host CPU %d host area freed, and SVM disabled\n", cpu_id);
914 * Test VMSAVE/VMLOAD Latency
916 #define vmsave ".byte 0x0F,0x01,0xDB ; "
917 #define vmload ".byte 0x0F,0x01,0xDA ; "
919 uint32_t start_lo, start_hi;
920 uint32_t end_lo, end_hi;
923 __asm__ __volatile__ (
925 "movl %%eax, %%esi ; "
926 "movl %%edx, %%edi ; "
927 "movq %%rcx, %%rax ; "
930 : "=D"(start_hi), "=S"(start_lo), "=a"(end_lo),"=d"(end_hi)
931 : "c"(host_vmcb[cpu_id]), "0"(0), "1"(0), "2"(0), "3"(0)
942 PrintDebug("VMSave Cycle Latency: %d\n", (uint32_t)(end - start));
944 __asm__ __volatile__ (
946 "movl %%eax, %%esi ; "
947 "movl %%edx, %%edi ; "
948 "movq %%rcx, %%rax ; "
951 : "=D"(start_hi), "=S"(start_lo), "=a"(end_lo),"=d"(end_hi)
952 : "c"(host_vmcb[cpu_id]), "0"(0), "1"(0), "2"(0), "3"(0)
964 PrintDebug("VMLoad Cycle Latency: %d\n", (uint32_t)(end - start));
966 /* End Latency Test */
977 void Init_VMCB_pe(vmcb_t *vmcb, struct guest_info vm_info) {
978 vmcb_ctrl_t * ctrl_area = GET_VMCB_CTRL_AREA(vmcb);
979 vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA(vmcb);
983 guest_state->rsp = vm_info.vm_regs.rsp;
984 guest_state->rip = vm_info.rip;
987 /* I pretty much just gutted this from TVMM */
988 /* Note: That means its probably wrong */
990 // set the segment registers to mirror ours
991 guest_state->cs.selector = 1<<3;
992 guest_state->cs.attrib.fields.type = 0xa; // Code segment+read
993 guest_state->cs.attrib.fields.S = 1;
994 guest_state->cs.attrib.fields.P = 1;
995 guest_state->cs.attrib.fields.db = 1;
996 guest_state->cs.attrib.fields.G = 1;
997 guest_state->cs.limit = 0xfffff;
998 guest_state->cs.base = 0;
1000 struct vmcb_selector *segregs [] = {&(guest_state->ss), &(guest_state->ds), &(guest_state->es), &(guest_state->fs), &(guest_state->gs), NULL};
1001 for ( i = 0; segregs[i] != NULL; i++) {
1002 struct vmcb_selector * seg = segregs[i];
1004 seg->selector = 2<<3;
1005 seg->attrib.fields.type = 0x2; // Data Segment+read/write
1006 seg->attrib.fields.S = 1;
1007 seg->attrib.fields.P = 1;
1008 seg->attrib.fields.db = 1;
1009 seg->attrib.fields.G = 1;
1010 seg->limit = 0xfffff;
1016 /* JRL THIS HAS TO GO */
1018 // guest_state->tr.selector = GetTR_Selector();
1019 guest_state->tr.attrib.fields.type = 0x9;
1020 guest_state->tr.attrib.fields.P = 1;
1021 // guest_state->tr.limit = GetTR_Limit();
1022 //guest_state->tr.base = GetTR_Base();// - 0x2000;
1030 guest_state->efer |= EFER_MSR_svm_enable;
1031 guest_state->rflags = 0x00000002; // The reserved bit is always 1
1032 ctrl_area->svm_instrs.VMRUN = 1;
1033 guest_state->cr0 = 0x00000001; // PE
1034 ctrl_area->guest_ASID = 1;
1037 // guest_state->cpl = 0;
1043 ctrl_area->cr_writes.cr4 = 1;
1045 ctrl_area->exceptions.de = 1;
1046 ctrl_area->exceptions.df = 1;
1047 ctrl_area->exceptions.pf = 1;
1048 ctrl_area->exceptions.ts = 1;
1049 ctrl_area->exceptions.ss = 1;
1050 ctrl_area->exceptions.ac = 1;
1051 ctrl_area->exceptions.mc = 1;
1052 ctrl_area->exceptions.gp = 1;
1053 ctrl_area->exceptions.ud = 1;
1054 ctrl_area->exceptions.np = 1;
1055 ctrl_area->exceptions.of = 1;
1056 ctrl_area->exceptions.nmi = 1;
1060 ctrl_area->instrs.IOIO_PROT = 1;
1061 ctrl_area->IOPM_BASE_PA = (uint_t)V3_AllocPages(3);
1065 tmp_reg.r_reg = ctrl_area->IOPM_BASE_PA;
1066 memset((void*)(tmp_reg.e_reg.low), 0xffffffff, PAGE_SIZE * 2);
1069 ctrl_area->instrs.INTR = 1;
1076 memset(gdt_buf, 0, 6);
1077 memset(idt_buf, 0, 6);
1080 uint_t gdt_base, idt_base;
1081 ushort_t gdt_limit, idt_limit;
1084 gdt_base = *(ulong_t*)((uchar_t*)gdt_buf + 2) & 0xffffffff;
1085 gdt_limit = *(ushort_t*)(gdt_buf) & 0xffff;
1086 PrintDebug("GDT: base: %x, limit: %x\n", gdt_base, gdt_limit);
1089 idt_base = *(ulong_t*)(idt_buf + 2) & 0xffffffff;
1090 idt_limit = *(ushort_t*)(idt_buf) & 0xffff;
1091 PrintDebug("IDT: base: %x, limit: %x\n",idt_base, idt_limit);
1094 // gdt_base -= 0x2000;
1095 //idt_base -= 0x2000;
1097 guest_state->gdtr.base = gdt_base;
1098 guest_state->gdtr.limit = gdt_limit;
1099 guest_state->idtr.base = idt_base;
1100 guest_state->idtr.limit = idt_limit;
1106 // also determine if CPU supports nested paging
1108 if (vm_info.page_tables) {
1110 // Flush the TLB on entries/exits
1111 ctrl_area->TLB_CONTROL = 1;
1113 // Enable Nested Paging
1114 ctrl_area->NP_ENABLE = 1;
1116 PrintDebug("NP_Enable at 0x%x\n", &(ctrl_area->NP_ENABLE));
1118 // Set the Nested Page Table pointer
1119 ctrl_area->N_CR3 |= ((addr_t)vm_info.page_tables & 0xfffff000);
1122 // ctrl_area->N_CR3 = Get_CR3();
1123 // guest_state->cr3 |= (Get_CR3() & 0xfffff000);
1125 guest_state->g_pat = 0x7040600070406ULL;
1127 PrintDebug("Set Nested CR3: lo: 0x%x hi: 0x%x\n", (uint_t)*(&(ctrl_area->N_CR3)), (uint_t)*((unsigned char *)&(ctrl_area->N_CR3) + 4));
1128 PrintDebug("Set Guest CR3: lo: 0x%x hi: 0x%x\n", (uint_t)*(&(guest_state->cr3)), (uint_t)*((unsigned char *)&(guest_state->cr3) + 4));
1130 // guest_state->cr0 |= 0x80000000;