2 * This file is part of the Palacios Virtual Machine Monitor developed
3 * by the V3VEE Project with funding from the United States National
4 * Science Foundation and the Department of Energy.
6 * The V3VEE Project is a joint project between Northwestern University
7 * and the University of New Mexico. You can find out more at
10 * Copyright (c) 2008, Jack Lange <jarusl@cs.northwestern.edu>
11 * Copyright (c) 2008, The V3VEE Project <http://www.v3vee.org>
12 * All rights reserved.
14 * Author: Jack Lange <jarusl@cs.northwestern.edu>
16 * This is free software. You are permitted to use,
17 * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
21 #include <palacios/svm.h>
22 #include <palacios/vmm.h>
24 #include <palacios/vmcb.h>
25 #include <palacios/vmm_mem.h>
26 #include <palacios/vmm_paging.h>
27 #include <palacios/svm_handler.h>
29 #include <palacios/vmm_debug.h>
30 #include <palacios/vm_guest_mem.h>
32 #include <palacios/vmm_decoder.h>
33 #include <palacios/vmm_string.h>
34 #include <palacios/vmm_lowlevel.h>
35 #include <palacios/svm_msr.h>
37 #include <palacios/vmm_rbtree.h>
39 #include <palacios/vmm_direct_paging.h>
41 #include <palacios/vmm_ctrl_regs.h>
42 #include <palacios/svm_io.h>
44 #include <palacios/vmm_sprintf.h>
47 #ifndef CONFIG_DEBUG_SVM
49 #define PrintDebug(fmt, args...)
53 uint32_t v3_last_exit;
55 // This is a global pointer to the host's VMCB
56 static addr_t host_vmcbs[CONFIG_MAX_CPUS] = { [0 ... CONFIG_MAX_CPUS - 1] = 0};
60 extern void v3_stgi();
61 extern void v3_clgi();
62 //extern int v3_svm_launch(vmcb_t * vmcb, struct v3_gprs * vm_regs, uint64_t * fs, uint64_t * gs);
63 extern int v3_svm_launch(vmcb_t * vmcb, struct v3_gprs * vm_regs, vmcb_t * host_vmcb);
66 static vmcb_t * Allocate_VMCB() {
67 vmcb_t * vmcb_page = (vmcb_t *)V3_VAddr(V3_AllocPages(1));
69 memset(vmcb_page, 0, 4096);
76 static void Init_VMCB_BIOS(vmcb_t * vmcb, struct guest_info * core) {
77 vmcb_ctrl_t * ctrl_area = GET_VMCB_CTRL_AREA(vmcb);
78 vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA(vmcb);
83 ctrl_area->svm_instrs.VMRUN = 1;
84 ctrl_area->svm_instrs.VMMCALL = 1;
85 ctrl_area->svm_instrs.VMLOAD = 1;
86 ctrl_area->svm_instrs.VMSAVE = 1;
87 ctrl_area->svm_instrs.STGI = 1;
88 ctrl_area->svm_instrs.CLGI = 1;
89 ctrl_area->svm_instrs.SKINIT = 1;
90 ctrl_area->svm_instrs.RDTSCP = 1;
91 ctrl_area->svm_instrs.ICEBP = 1;
92 ctrl_area->svm_instrs.WBINVD = 1;
93 ctrl_area->svm_instrs.MONITOR = 1;
94 ctrl_area->svm_instrs.MWAIT_always = 1;
95 ctrl_area->svm_instrs.MWAIT_if_armed = 1;
96 ctrl_area->instrs.INVLPGA = 1;
97 ctrl_area->instrs.CPUID = 1;
99 ctrl_area->instrs.HLT = 1;
100 // guest_state->cr0 = 0x00000001; // PE
103 ctrl_area->exceptions.de = 1;
104 ctrl_area->exceptions.df = 1;
106 ctrl_area->exceptions.ts = 1;
107 ctrl_area->exceptions.ss = 1;
108 ctrl_area->exceptions.ac = 1;
109 ctrl_area->exceptions.mc = 1;
110 ctrl_area->exceptions.gp = 1;
111 ctrl_area->exceptions.ud = 1;
112 ctrl_area->exceptions.np = 1;
113 ctrl_area->exceptions.of = 1;
115 ctrl_area->exceptions.nmi = 1;
119 ctrl_area->instrs.NMI = 1;
120 ctrl_area->instrs.SMI = 0; // allow SMIs to run in guest
121 ctrl_area->instrs.INIT = 1;
122 ctrl_area->instrs.PAUSE = 1;
123 ctrl_area->instrs.shutdown_evts = 1;
126 /* DEBUG FOR RETURN CODE */
127 ctrl_area->exit_code = 1;
130 /* Setup Guest Machine state */
132 core->vm_regs.rsp = 0x00;
135 core->vm_regs.rdx = 0x00000f00;
140 core->ctrl_regs.rflags = 0x00000002; // The reserved bit is always 1
141 core->ctrl_regs.cr0 = 0x60010010; // Set the WP flag so the memory hooks work in real-mode
142 core->ctrl_regs.efer |= EFER_MSR_svm_enable;
148 core->segments.cs.selector = 0xf000;
149 core->segments.cs.limit = 0xffff;
150 core->segments.cs.base = 0x0000000f0000LL;
152 // (raw attributes = 0xf3)
153 core->segments.cs.type = 0x3;
154 core->segments.cs.system = 0x1;
155 core->segments.cs.dpl = 0x3;
156 core->segments.cs.present = 1;
160 struct v3_segment * segregs [] = {&(core->segments.ss), &(core->segments.ds),
161 &(core->segments.es), &(core->segments.fs),
162 &(core->segments.gs), NULL};
164 for ( i = 0; segregs[i] != NULL; i++) {
165 struct v3_segment * seg = segregs[i];
167 seg->selector = 0x0000;
168 // seg->base = seg->selector << 4;
169 seg->base = 0x00000000;
172 // (raw attributes = 0xf3)
179 core->segments.gdtr.limit = 0x0000ffff;
180 core->segments.gdtr.base = 0x0000000000000000LL;
181 core->segments.idtr.limit = 0x0000ffff;
182 core->segments.idtr.base = 0x0000000000000000LL;
184 core->segments.ldtr.selector = 0x0000;
185 core->segments.ldtr.limit = 0x0000ffff;
186 core->segments.ldtr.base = 0x0000000000000000LL;
187 core->segments.tr.selector = 0x0000;
188 core->segments.tr.limit = 0x0000ffff;
189 core->segments.tr.base = 0x0000000000000000LL;
192 core->dbg_regs.dr6 = 0x00000000ffff0ff0LL;
193 core->dbg_regs.dr7 = 0x0000000000000400LL;
196 ctrl_area->IOPM_BASE_PA = (addr_t)V3_PAddr(core->vm_info->io_map.arch_data);
197 ctrl_area->instrs.IOIO_PROT = 1;
199 ctrl_area->MSRPM_BASE_PA = (addr_t)V3_PAddr(core->vm_info->msr_map.arch_data);
200 ctrl_area->instrs.MSR_PROT = 1;
203 PrintDebug("Exiting on interrupts\n");
204 ctrl_area->guest_ctrl.V_INTR_MASKING = 1;
205 ctrl_area->instrs.INTR = 1;
208 if (core->shdw_pg_mode == SHADOW_PAGING) {
209 PrintDebug("Creating initial shadow page table\n");
211 /* JRL: This is a performance killer, and a simplistic solution */
212 /* We need to fix this */
213 ctrl_area->TLB_CONTROL = 1;
214 ctrl_area->guest_ASID = 1;
217 if (v3_init_passthrough_pts(core) == -1) {
218 PrintError("Could not initialize passthrough page tables\n");
223 core->shdw_pg_state.guest_cr0 = 0x0000000000000010LL;
224 PrintDebug("Created\n");
226 core->ctrl_regs.cr0 |= 0x80000000;
227 core->ctrl_regs.cr3 = core->direct_map_pt;
229 ctrl_area->cr_reads.cr0 = 1;
230 ctrl_area->cr_writes.cr0 = 1;
231 //ctrl_area->cr_reads.cr4 = 1;
232 ctrl_area->cr_writes.cr4 = 1;
233 ctrl_area->cr_reads.cr3 = 1;
234 ctrl_area->cr_writes.cr3 = 1;
236 v3_hook_msr(core->vm_info, EFER_MSR,
237 &v3_handle_efer_read,
238 &v3_handle_efer_write,
241 ctrl_area->instrs.INVLPG = 1;
243 ctrl_area->exceptions.pf = 1;
245 guest_state->g_pat = 0x7040600070406ULL;
249 } else if (core->shdw_pg_mode == NESTED_PAGING) {
250 // Flush the TLB on entries/exits
251 ctrl_area->TLB_CONTROL = 1;
252 ctrl_area->guest_ASID = 1;
254 // Enable Nested Paging
255 ctrl_area->NP_ENABLE = 1;
257 PrintDebug("NP_Enable at 0x%p\n", (void *)&(ctrl_area->NP_ENABLE));
259 // Set the Nested Page Table pointer
260 if (v3_init_passthrough_pts(core) == -1) {
261 PrintError("Could not initialize Nested page tables\n");
265 ctrl_area->N_CR3 = core->direct_map_pt;
267 guest_state->g_pat = 0x7040600070406ULL;
272 int v3_init_svm_vmcb(struct guest_info * info, v3_vm_class_t vm_class) {
274 PrintDebug("Allocating VMCB\n");
275 info->vmm_data = (void*)Allocate_VMCB();
277 if (vm_class == V3_PC_VM) {
278 PrintDebug("Initializing VMCB (addr=%p)\n", (void *)info->vmm_data);
279 Init_VMCB_BIOS((vmcb_t*)(info->vmm_data), info);
281 PrintError("Invalid VM class\n");
290 static int update_irq_exit_state(struct guest_info * info) {
291 vmcb_ctrl_t * guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data));
293 // Fix for QEMU bug using EVENTINJ as an internal cache
294 guest_ctrl->EVENTINJ.valid = 0;
296 if ((info->intr_core_state.irq_pending == 1) && (guest_ctrl->guest_ctrl.V_IRQ == 0)) {
298 #ifdef CONFIG_DEBUG_INTERRUPTS
299 PrintDebug("INTAK cycle completed for irq %d\n", info->intr_core_state.irq_vector);
302 info->intr_core_state.irq_started = 1;
303 info->intr_core_state.irq_pending = 0;
305 v3_injecting_intr(info, info->intr_core_state.irq_vector, V3_EXTERNAL_IRQ);
308 if ((info->intr_core_state.irq_started == 1) && (guest_ctrl->exit_int_info.valid == 0)) {
309 #ifdef CONFIG_DEBUG_INTERRUPTS
310 PrintDebug("Interrupt %d taken by guest\n", info->intr_core_state.irq_vector);
313 // Interrupt was taken fully vectored
314 info->intr_core_state.irq_started = 0;
316 } else if ((info->intr_core_state.irq_started == 1) && (guest_ctrl->exit_int_info.valid == 1)) {
317 #ifdef CONFIG_DEBUG_INTERRUPTS
318 PrintDebug("EXIT INT INFO is set (vec=%d)\n", guest_ctrl->exit_int_info.vector);
326 static int update_irq_entry_state(struct guest_info * info) {
327 vmcb_ctrl_t * guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data));
330 if (info->intr_core_state.irq_pending == 0) {
331 guest_ctrl->guest_ctrl.V_IRQ = 0;
332 guest_ctrl->guest_ctrl.V_INTR_VECTOR = 0;
335 if (v3_excp_pending(info)) {
336 uint_t excp = v3_get_excp_number(info);
338 guest_ctrl->EVENTINJ.type = SVM_INJECTION_EXCEPTION;
340 if (info->excp_state.excp_error_code_valid) {
341 guest_ctrl->EVENTINJ.error_code = info->excp_state.excp_error_code;
342 guest_ctrl->EVENTINJ.ev = 1;
343 #ifdef CONFIG_DEBUG_INTERRUPTS
344 PrintDebug("Injecting exception %d with error code %x\n", excp, guest_ctrl->EVENTINJ.error_code);
348 guest_ctrl->EVENTINJ.vector = excp;
350 guest_ctrl->EVENTINJ.valid = 1;
352 #ifdef CONFIG_DEBUG_INTERRUPTS
353 PrintDebug("<%d> Injecting Exception %d (CR2=%p) (EIP=%p)\n",
354 (int)info->num_exits,
355 guest_ctrl->EVENTINJ.vector,
356 (void *)(addr_t)info->ctrl_regs.cr2,
357 (void *)(addr_t)info->rip);
360 v3_injecting_excp(info, excp);
361 } else if (info->intr_core_state.irq_started == 1) {
362 #ifdef CONFIG_DEBUG_INTERRUPTS
363 PrintDebug("IRQ pending from previous injection\n");
365 guest_ctrl->guest_ctrl.V_IRQ = 1;
366 guest_ctrl->guest_ctrl.V_INTR_VECTOR = info->intr_core_state.irq_vector;
367 guest_ctrl->guest_ctrl.V_IGN_TPR = 1;
368 guest_ctrl->guest_ctrl.V_INTR_PRIO = 0xf;
371 switch (v3_intr_pending(info)) {
372 case V3_EXTERNAL_IRQ: {
373 uint32_t irq = v3_get_intr(info);
375 guest_ctrl->guest_ctrl.V_IRQ = 1;
376 guest_ctrl->guest_ctrl.V_INTR_VECTOR = irq;
377 guest_ctrl->guest_ctrl.V_IGN_TPR = 1;
378 guest_ctrl->guest_ctrl.V_INTR_PRIO = 0xf;
380 #ifdef CONFIG_DEBUG_INTERRUPTS
381 PrintDebug("Injecting Interrupt %d (EIP=%p)\n",
382 guest_ctrl->guest_ctrl.V_INTR_VECTOR,
383 (void *)(addr_t)info->rip);
386 info->intr_core_state.irq_pending = 1;
387 info->intr_core_state.irq_vector = irq;
392 guest_ctrl->EVENTINJ.type = SVM_INJECTION_NMI;
394 case V3_SOFTWARE_INTR:
395 guest_ctrl->EVENTINJ.type = SVM_INJECTION_SOFT_INTR;
398 guest_ctrl->EVENTINJ.type = SVM_INJECTION_IRQ;
401 case V3_INVALID_INTR:
413 * CAUTION and DANGER!!!
415 * The VMCB CANNOT(!!) be accessed outside of the clgi/stgi calls inside this function
416 * When exectuing a symbiotic call, the VMCB WILL be overwritten, so any dependencies
417 * on its contents will cause things to break. The contents at the time of the exit WILL
418 * change before the exit handler is executed.
420 int v3_svm_enter(struct guest_info * info) {
421 vmcb_ctrl_t * guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data));
422 vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA((vmcb_t*)(info->vmm_data));
423 addr_t exit_code = 0, exit_info1 = 0, exit_info2 = 0;
425 // Conditionally yield the CPU if the timeslice has expired
428 // disable global interrupts for vm state transition
431 // Synchronize the guest state to the VMCB
432 guest_state->cr0 = info->ctrl_regs.cr0;
433 guest_state->cr2 = info->ctrl_regs.cr2;
434 guest_state->cr3 = info->ctrl_regs.cr3;
435 guest_state->cr4 = info->ctrl_regs.cr4;
436 guest_state->dr6 = info->dbg_regs.dr6;
437 guest_state->dr7 = info->dbg_regs.dr7;
438 guest_ctrl->guest_ctrl.V_TPR = info->ctrl_regs.cr8 & 0xff;
439 guest_state->rflags = info->ctrl_regs.rflags;
440 guest_state->efer = info->ctrl_regs.efer;
442 guest_state->cpl = info->cpl;
444 v3_set_vmcb_segments((vmcb_t*)(info->vmm_data), &(info->segments));
446 guest_state->rax = info->vm_regs.rax;
447 guest_state->rip = info->rip;
448 guest_state->rsp = info->vm_regs.rsp;
450 #ifdef CONFIG_SYMCALL
451 if (info->sym_core_state.symcall_state.sym_call_active == 0) {
452 update_irq_entry_state(info);
455 update_irq_entry_state(info);
462 PrintDebug("SVM Entry to CS=%p rip=%p...\n",
463 (void *)(addr_t)info->segments.cs.base,
464 (void *)(addr_t)info->rip);
467 #ifdef CONFIG_SYMCALL
468 if (info->sym_core_state.symcall_state.sym_call_active == 1) {
469 if (guest_ctrl->guest_ctrl.V_IRQ == 1) {
470 V3_Print("!!! Injecting Interrupt during Sym call !!!\n");
475 v3_update_timers(info);
477 guest_ctrl->TSC_OFFSET = v3_tsc_host_offset(&info->time_state);
479 //V3_Print("Calling v3_svm_launch\n");
481 v3_svm_launch((vmcb_t *)V3_PAddr(info->vmm_data), &(info->vm_regs), (vmcb_t *)host_vmcbs[info->cpu_id]);
483 v3_adjust_time(info);
485 //V3_Print("SVM Returned: Exit Code: %x, guest_rip=%lx\n", (uint32_t)(guest_ctrl->exit_code), (unsigned long)guest_state->rip);
487 v3_last_exit = (uint32_t)(guest_ctrl->exit_code);
489 //PrintDebug("SVM Returned\n");
493 // Save Guest state from VMCB
494 info->rip = guest_state->rip;
495 info->vm_regs.rsp = guest_state->rsp;
496 info->vm_regs.rax = guest_state->rax;
498 info->cpl = guest_state->cpl;
500 info->ctrl_regs.cr0 = guest_state->cr0;
501 info->ctrl_regs.cr2 = guest_state->cr2;
502 info->ctrl_regs.cr3 = guest_state->cr3;
503 info->ctrl_regs.cr4 = guest_state->cr4;
504 info->dbg_regs.dr6 = guest_state->dr6;
505 info->dbg_regs.dr7 = guest_state->dr7;
506 info->ctrl_regs.cr8 = guest_ctrl->guest_ctrl.V_TPR;
507 info->ctrl_regs.rflags = guest_state->rflags;
508 info->ctrl_regs.efer = guest_state->efer;
510 v3_get_vmcb_segments((vmcb_t*)(info->vmm_data), &(info->segments));
511 info->cpu_mode = v3_get_vm_cpu_mode(info);
512 info->mem_mode = v3_get_vm_mem_mode(info);
516 // save exit info here
517 exit_code = guest_ctrl->exit_code;
518 exit_info1 = guest_ctrl->exit_info1;
519 exit_info2 = guest_ctrl->exit_info2;
522 #ifdef CONFIG_SYMCALL
523 if (info->sym_core_state.symcall_state.sym_call_active == 0) {
524 update_irq_exit_state(info);
527 update_irq_exit_state(info);
531 // reenable global interrupts after vm exit
535 // Conditionally yield the CPU if the timeslice has expired
540 if (v3_handle_svm_exit(info, exit_code, exit_info1, exit_info2) != 0) {
541 PrintError("Error in SVM exit handler\n");
550 int v3_start_svm_guest(struct guest_info *info) {
551 // vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA((vmcb_t*)(info->vmm_data));
552 // vmcb_ctrl_t * guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data));
555 PrintDebug("Starting SVM core %u\n",info->cpu_id);
556 if (info->cpu_mode==INIT) {
557 PrintDebug("SVM core %u: I am an AP in INIT mode, waiting for that to change\n",info->cpu_id);
558 while (info->cpu_mode==INIT) {
560 //PrintDebug("SVM core %u: still waiting for INIT\n",info->cpu_id);
562 PrintDebug("SVM core %u: I am out of INIT\n",info->cpu_id);
563 if (info->cpu_mode==SIPI) {
564 PrintDebug("SVM core %u: I am waiting on a SIPI to set my starting address\n",info->cpu_id);
565 while (info->cpu_mode==SIPI) {
567 //PrintDebug("SVM core %u: still waiting for SIPI\n",info->cpu_id);
570 PrintDebug("SVM core %u: I have my SIPI\n", info->cpu_id);
573 if (info->cpu_mode!=REAL) {
574 PrintError("SVM core %u: I am not in REAL mode at launch! Huh?!\n", info->cpu_id);
578 PrintDebug("SVM core %u: I am starting at CS=0x%x (base=0x%p, limit=0x%x), RIP=0x%p\n",
579 info->cpu_id, info->segments.cs.selector, (void*)(info->segments.cs.base),
580 info->segments.cs.limit,(void*)(info->rip));
584 PrintDebug("SVM core %u: Launching SVM VM (vmcb=%p)\n", info->cpu_id, (void *)info->vmm_data);
585 //PrintDebugVMCB((vmcb_t*)(info->vmm_data));
587 info->vm_info->run_state = VM_RUNNING;
591 if (v3_svm_enter(info) == -1) {
592 vmcb_ctrl_t * guest_ctrl = GET_VMCB_CTRL_AREA((vmcb_t*)(info->vmm_data));
594 addr_t linear_addr = 0;
596 info->vm_info->run_state = VM_ERROR;
598 V3_Print("SVM core %u: SVM ERROR!!\n", info->cpu_id);
600 v3_print_guest_state(info);
602 V3_Print("SVM core %u: SVM Exit Code: %p\n", info->cpu_id, (void *)(addr_t)guest_ctrl->exit_code);
604 V3_Print("SVM core %u: exit_info1 low = 0x%.8x\n", info->cpu_id, *(uint_t*)&(guest_ctrl->exit_info1));
605 V3_Print("SVM core %u: exit_info1 high = 0x%.8x\n", info->cpu_id, *(uint_t *)(((uchar_t *)&(guest_ctrl->exit_info1)) + 4));
607 V3_Print("SVM core %u: exit_info2 low = 0x%.8x\n", info->cpu_id, *(uint_t*)&(guest_ctrl->exit_info2));
608 V3_Print("SVM core %u: exit_info2 high = 0x%.8x\n", info->cpu_id, *(uint_t *)(((uchar_t *)&(guest_ctrl->exit_info2)) + 4));
610 linear_addr = get_addr_linear(info, info->rip, &(info->segments.cs));
612 if (info->mem_mode == PHYSICAL_MEM) {
613 v3_gpa_to_hva(info, linear_addr, &host_addr);
614 } else if (info->mem_mode == VIRTUAL_MEM) {
615 v3_gva_to_hva(info, linear_addr, &host_addr);
618 V3_Print("SVM core %u: Host Address of rip = 0x%p\n", info->cpu_id, (void *)host_addr);
620 V3_Print("SVM core %u: Instr (15 bytes) at %p:\n", info->cpu_id, (void *)host_addr);
621 v3_dump_mem((uint8_t *)host_addr, 15);
623 v3_print_stack(info);
629 if ((info->num_exits % 5000) == 0) {
630 V3_Print("SVM Exit number %d\n", (uint32_t)info->num_exits);
636 // Need to take down the other cores on error...
645 /* Checks machine SVM capability */
646 /* Implemented from: AMD Arch Manual 3, sect 15.4 */
647 int v3_is_svm_capable() {
648 uint_t vm_cr_low = 0, vm_cr_high = 0;
649 uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0;
651 v3_cpuid(CPUID_EXT_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
653 PrintDebug("CPUID_EXT_FEATURE_IDS_ecx=0x%x\n", ecx);
655 if ((ecx & CPUID_EXT_FEATURE_IDS_ecx_svm_avail) == 0) {
656 V3_Print("SVM Not Available\n");
659 v3_get_msr(SVM_VM_CR_MSR, &vm_cr_high, &vm_cr_low);
661 PrintDebug("SVM_VM_CR_MSR = 0x%x 0x%x\n", vm_cr_high, vm_cr_low);
663 if ((vm_cr_low & SVM_VM_CR_MSR_svmdis) == 1) {
664 V3_Print("SVM is available but is disabled.\n");
666 v3_cpuid(CPUID_SVM_REV_AND_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
668 PrintDebug("CPUID_SVM_REV_AND_FEATURE_IDS_edx=0x%x\n", edx);
670 if ((edx & CPUID_SVM_REV_AND_FEATURE_IDS_edx_svml) == 0) {
671 V3_Print("SVM BIOS Disabled, not unlockable\n");
673 V3_Print("SVM is locked with a key\n");
678 V3_Print("SVM is available and enabled.\n");
680 v3_cpuid(CPUID_SVM_REV_AND_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
681 PrintDebug("CPUID_SVM_REV_AND_FEATURE_IDS_eax=0x%x\n", eax);
682 PrintDebug("CPUID_SVM_REV_AND_FEATURE_IDS_ebx=0x%x\n", ebx);
683 PrintDebug("CPUID_SVM_REV_AND_FEATURE_IDS_ecx=0x%x\n", ecx);
684 PrintDebug("CPUID_SVM_REV_AND_FEATURE_IDS_edx=0x%x\n", edx);
691 static int has_svm_nested_paging() {
692 uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0;
694 v3_cpuid(CPUID_SVM_REV_AND_FEATURE_IDS, &eax, &ebx, &ecx, &edx);
696 //PrintDebug("CPUID_EXT_FEATURE_IDS_edx=0x%x\n", edx);
698 if ((edx & CPUID_SVM_REV_AND_FEATURE_IDS_edx_np) == 0) {
699 V3_Print("SVM Nested Paging not supported\n");
702 V3_Print("SVM Nested Paging supported\n");
708 void v3_init_svm_cpu(int cpu_id) {
710 extern v3_cpu_arch_t v3_cpu_types[];
712 // Enable SVM on the CPU
713 v3_get_msr(EFER_MSR, &(msr.e_reg.high), &(msr.e_reg.low));
714 msr.e_reg.low |= EFER_MSR_svm_enable;
715 v3_set_msr(EFER_MSR, 0, msr.e_reg.low);
717 V3_Print("SVM Enabled\n");
719 // Setup the host state save area
720 host_vmcbs[cpu_id] = (addr_t)V3_AllocPages(4);
723 // msr.e_reg.high = 0;
724 //msr.e_reg.low = (uint_t)host_vmcb;
725 msr.r_reg = host_vmcbs[cpu_id];
727 PrintDebug("Host State being saved at %p\n", (void *)host_vmcbs[cpu_id]);
728 v3_set_msr(SVM_VM_HSAVE_PA_MSR, msr.e_reg.high, msr.e_reg.low);
731 if (has_svm_nested_paging() == 1) {
732 v3_cpu_types[cpu_id] = V3_SVM_REV3_CPU;
734 v3_cpu_types[cpu_id] = V3_SVM_CPU;
793 * Test VMSAVE/VMLOAD Latency
795 #define vmsave ".byte 0x0F,0x01,0xDB ; "
796 #define vmload ".byte 0x0F,0x01,0xDA ; "
798 uint32_t start_lo, start_hi;
799 uint32_t end_lo, end_hi;
802 __asm__ __volatile__ (
804 "movl %%eax, %%esi ; "
805 "movl %%edx, %%edi ; "
806 "movq %%rcx, %%rax ; "
809 : "=D"(start_hi), "=S"(start_lo), "=a"(end_lo),"=d"(end_hi)
810 : "c"(host_vmcb[cpu_id]), "0"(0), "1"(0), "2"(0), "3"(0)
821 PrintDebug("VMSave Cycle Latency: %d\n", (uint32_t)(end - start));
823 __asm__ __volatile__ (
825 "movl %%eax, %%esi ; "
826 "movl %%edx, %%edi ; "
827 "movq %%rcx, %%rax ; "
830 : "=D"(start_hi), "=S"(start_lo), "=a"(end_lo),"=d"(end_hi)
831 : "c"(host_vmcb[cpu_id]), "0"(0), "1"(0), "2"(0), "3"(0)
843 PrintDebug("VMLoad Cycle Latency: %d\n", (uint32_t)(end - start));
845 /* End Latency Test */
856 void Init_VMCB_pe(vmcb_t *vmcb, struct guest_info vm_info) {
857 vmcb_ctrl_t * ctrl_area = GET_VMCB_CTRL_AREA(vmcb);
858 vmcb_saved_state_t * guest_state = GET_VMCB_SAVE_STATE_AREA(vmcb);
862 guest_state->rsp = vm_info.vm_regs.rsp;
863 guest_state->rip = vm_info.rip;
866 /* I pretty much just gutted this from TVMM */
867 /* Note: That means its probably wrong */
869 // set the segment registers to mirror ours
870 guest_state->cs.selector = 1<<3;
871 guest_state->cs.attrib.fields.type = 0xa; // Code segment+read
872 guest_state->cs.attrib.fields.S = 1;
873 guest_state->cs.attrib.fields.P = 1;
874 guest_state->cs.attrib.fields.db = 1;
875 guest_state->cs.attrib.fields.G = 1;
876 guest_state->cs.limit = 0xfffff;
877 guest_state->cs.base = 0;
879 struct vmcb_selector *segregs [] = {&(guest_state->ss), &(guest_state->ds), &(guest_state->es), &(guest_state->fs), &(guest_state->gs), NULL};
880 for ( i = 0; segregs[i] != NULL; i++) {
881 struct vmcb_selector * seg = segregs[i];
883 seg->selector = 2<<3;
884 seg->attrib.fields.type = 0x2; // Data Segment+read/write
885 seg->attrib.fields.S = 1;
886 seg->attrib.fields.P = 1;
887 seg->attrib.fields.db = 1;
888 seg->attrib.fields.G = 1;
889 seg->limit = 0xfffff;
895 /* JRL THIS HAS TO GO */
897 // guest_state->tr.selector = GetTR_Selector();
898 guest_state->tr.attrib.fields.type = 0x9;
899 guest_state->tr.attrib.fields.P = 1;
900 // guest_state->tr.limit = GetTR_Limit();
901 //guest_state->tr.base = GetTR_Base();// - 0x2000;
909 guest_state->efer |= EFER_MSR_svm_enable;
910 guest_state->rflags = 0x00000002; // The reserved bit is always 1
911 ctrl_area->svm_instrs.VMRUN = 1;
912 guest_state->cr0 = 0x00000001; // PE
913 ctrl_area->guest_ASID = 1;
916 // guest_state->cpl = 0;
922 ctrl_area->cr_writes.cr4 = 1;
924 ctrl_area->exceptions.de = 1;
925 ctrl_area->exceptions.df = 1;
926 ctrl_area->exceptions.pf = 1;
927 ctrl_area->exceptions.ts = 1;
928 ctrl_area->exceptions.ss = 1;
929 ctrl_area->exceptions.ac = 1;
930 ctrl_area->exceptions.mc = 1;
931 ctrl_area->exceptions.gp = 1;
932 ctrl_area->exceptions.ud = 1;
933 ctrl_area->exceptions.np = 1;
934 ctrl_area->exceptions.of = 1;
935 ctrl_area->exceptions.nmi = 1;
939 ctrl_area->instrs.IOIO_PROT = 1;
940 ctrl_area->IOPM_BASE_PA = (uint_t)V3_AllocPages(3);
944 tmp_reg.r_reg = ctrl_area->IOPM_BASE_PA;
945 memset((void*)(tmp_reg.e_reg.low), 0xffffffff, PAGE_SIZE * 2);
948 ctrl_area->instrs.INTR = 1;
955 memset(gdt_buf, 0, 6);
956 memset(idt_buf, 0, 6);
959 uint_t gdt_base, idt_base;
960 ushort_t gdt_limit, idt_limit;
963 gdt_base = *(ulong_t*)((uchar_t*)gdt_buf + 2) & 0xffffffff;
964 gdt_limit = *(ushort_t*)(gdt_buf) & 0xffff;
965 PrintDebug("GDT: base: %x, limit: %x\n", gdt_base, gdt_limit);
968 idt_base = *(ulong_t*)(idt_buf + 2) & 0xffffffff;
969 idt_limit = *(ushort_t*)(idt_buf) & 0xffff;
970 PrintDebug("IDT: base: %x, limit: %x\n",idt_base, idt_limit);
973 // gdt_base -= 0x2000;
974 //idt_base -= 0x2000;
976 guest_state->gdtr.base = gdt_base;
977 guest_state->gdtr.limit = gdt_limit;
978 guest_state->idtr.base = idt_base;
979 guest_state->idtr.limit = idt_limit;
985 // also determine if CPU supports nested paging
987 if (vm_info.page_tables) {
989 // Flush the TLB on entries/exits
990 ctrl_area->TLB_CONTROL = 1;
992 // Enable Nested Paging
993 ctrl_area->NP_ENABLE = 1;
995 PrintDebug("NP_Enable at 0x%x\n", &(ctrl_area->NP_ENABLE));
997 // Set the Nested Page Table pointer
998 ctrl_area->N_CR3 |= ((addr_t)vm_info.page_tables & 0xfffff000);
1001 // ctrl_area->N_CR3 = Get_CR3();
1002 // guest_state->cr3 |= (Get_CR3() & 0xfffff000);
1004 guest_state->g_pat = 0x7040600070406ULL;
1006 PrintDebug("Set Nested CR3: lo: 0x%x hi: 0x%x\n", (uint_t)*(&(ctrl_area->N_CR3)), (uint_t)*((unsigned char *)&(ctrl_area->N_CR3) + 4));
1007 PrintDebug("Set Guest CR3: lo: 0x%x hi: 0x%x\n", (uint_t)*(&(guest_state->cr3)), (uint_t)*((unsigned char *)&(guest_state->cr3) + 4));
1009 // guest_state->cr0 |= 0x80000000;