3 #ifdef V3_CONFIG_SHADOW_CACHE
5 static inline int activate_shadow_pt_32(struct guest_info * core) {
6 struct cr3_32 * shadow_cr3 = (struct cr3_32 *)&(core->ctrl_regs.cr3);
7 struct cr3_32 * guest_cr3 = (struct cr3_32 *)&(core->shdw_pg_state.guest_cr3);
9 struct shadow_page_cache_data * shdw_page;
11 if (core->n_free_shadow_pages < MIN_FREE_SHADOW_PAGES) {
12 shadow_free_some_pages(core);
15 shdw_page = shadow_page_get_page(core, (addr_t)(guest_cr3->pdt_base_addr), 2, 0, 0, 0, 0);
16 PrintDebug(info->vm_info, info, "act shdw pt: gcr3 %p\n",(void *)BASE_TO_PAGE_ADDR(guest_cr3->pdt_base_addr));
18 shdw_page->cr3 = shdw_page->page_pa;
20 shadow_cr3->pdt_base_addr = PAGE_BASE_ADDR_4KB(shdw_page->page_pa);
21 PrintDebug(info->vm_info, info, "Created new shadow page table %p\n", (void *)BASE_TO_PAGE_ADDR(shadow_cr3->pdt_base_addr));
23 shadow_cr3->pwt = guest_cr3->pwt;
24 shadow_cr3->pcd = guest_cr3->pcd;
35 * * 32 bit Page table fault handlers
40 static inline int fix_read_pf_32(pte32_t * shadow_pte, uint_t vmm_info) {
41 PrintDebug(info->vm_info, info, "\trdipf, start vmm_info %d\n",vmm_info);
42 if((vmm_info & PT_USER_MASK) && !(shadow_pte->user_page)) {
43 shadow_pte->user_page = 1;
44 shadow_pte->writable = 0;
50 static inline int fix_write_pf_32(struct guest_info * core, pte32_t * shadow_pte, pte32_t * guest_pte,
51 int user, int * write_pt, addr_t guest_fn, uint_t vmm_info) {
54 struct cr0_32 * guest_cr0;
55 struct shadow_page_cache_data * page;
58 PrintDebug(info->vm_info, info, "\twripf, start vmm_info %d\n",vmm_info);
60 if(shadow_pte->writable) {
64 PrintDebug(info->vm_info, info, "\twrpf: pass writable\n");
66 writable_shadow = vmm_info & PT_WRITABLE_MASK;
68 PrintDebug(info->vm_info, info, "\twrpf: writable_shadow %d\n",writable_shadow);
71 if(!(vmm_info & PT_USER_MASK) || !writable_shadow) {
72 PrintDebug(info->vm_info, info, "\twrpf: 1st usr chk\n");
76 if(!writable_shadow) {
77 guest_cr0 = (struct cr0_32 *)&(core->shdw_pg_state.guest_cr0);
78 PrintDebug(info->vm_info, info, "\twrpf: wp %d\n",guest_cr0->wp);
83 shadow_pte->user_page = 0;
87 if (guest_pte->present == 0) {
88 memset((void *)shadow_pte, 0, sizeof(uint32_t));
89 PrintDebug(info->vm_info, info, "\twrpf: guest non present\n");
94 while ((page = shadow_page_lookup_page(core, guest_fn, 0)) != NULL) {
95 shadow_zap_page(core,page);
98 PrintDebug(info->vm_info, info, "\twrpf: zap\n");
100 } else if((page = shadow_page_lookup_page(core, guest_fn,0)) != NULL) {
101 if ((page = shadow_page_lookup_page(core, guest_fn,0)) != NULL) {
102 guest_pte->dirty = 1;
104 PrintDebug(info->vm_info, info, "\twrpf: write need\n");
109 shadow_pte->writable = 1; //will lost every pt update trap not sure for this
110 guest_pte->dirty = 1;
112 rmap_add(core, (addr_t)shadow_pte);
114 PrintDebug(info->vm_info, info, "\twrpf: on writable\n");
121 static int handle_4MB_shadow_pagefault_32(struct guest_info * core, addr_t fault_addr, pf_error_t error_code,
122 pte32_t * shadow_pt, pde32_4MB_t * large_guest_pde);
124 static int handle_pte_shadow_pagefault_32(struct guest_info * core, addr_t fault_addr, pf_error_t error_code,
125 pte32_t * shadow_pt, pte32_t * guest_pt);
128 static inline int handle_shadow_pagefault_32(struct guest_info * core, addr_t fault_addr, pf_error_t error_code) {
129 pde32_t * guest_pd = NULL;
130 pde32_t * shadow_pd = CR3_TO_PDE32_VA(core->ctrl_regs.cr3);
131 addr_t guest_cr3 = CR3_TO_PDE32_PA(core->shdw_pg_state.guest_cr3);
132 pt_access_status_t guest_pde_access;
133 pt_access_status_t shadow_pde_access;
134 pde32_t * guest_pde = NULL;
135 pde32_t * shadow_pde = (pde32_t *)&(shadow_pd[PDE32_INDEX(fault_addr)]);
137 PrintDebug(info->vm_info, info, "Shadow page fault handler: %p\n", (void*) fault_addr );
138 PrintDebug(info->vm_info, info, "Handling PDE32 Fault\n");
140 if (guest_pa_to_host_va(core, guest_cr3, (addr_t*)&guest_pd) == -1) {
141 PrintError(info->vm_info, info, "Invalid Guest PDE Address: 0x%p\n", (void *)guest_cr3);
145 guest_pde = (pde32_t *)&(guest_pd[PDE32_INDEX(fault_addr)]);
148 // Check the guest page permissions
149 guest_pde_access = v3_can_access_pde32(guest_pd, fault_addr, error_code);
151 // Check the shadow page permissions
152 shadow_pde_access = v3_can_access_pde32(shadow_pd, fault_addr, error_code);
154 /* Was the page fault caused by the Guest's page tables? */
155 if (v3_is_guest_pf(guest_pde_access, shadow_pde_access) == 1) {
156 PrintDebug(info->vm_info, info, "Injecting PDE pf to guest: (guest access error=%d) (shdw access error=%d) (pf error code=%d)\n",
157 *(uint_t *)&guest_pde_access, *(uint_t *)&shadow_pde_access, *(uint_t *)&error_code);
158 if (v3_inject_guest_pf(core, fault_addr, error_code) == -1) {
159 PrintError(info->vm_info, info, "Could not inject guest page fault for vaddr %p\n", (void *)fault_addr);
167 if (shadow_pde_access == PT_ACCESS_USER_ERROR) {
169 // PDE Entry marked non user
171 PrintDebug(info->vm_info, info, "Shadow Paging User access error (shadow_pde_access=0x%x, guest_pde_access=0x%x)\n",
172 shadow_pde_access, guest_pde_access);
174 if (v3_inject_guest_pf(core, fault_addr, error_code) == -1) {
175 PrintError(info->vm_info, info, "Could not inject guest page fault for vaddr %p\n", (void *)fault_addr);
179 } else if ((shadow_pde_access == PT_ACCESS_WRITE_ERROR) &&
180 (guest_pde->large_page == 1)) {
182 ((pde32_4MB_t *)guest_pde)->dirty = 1;
183 shadow_pde->writable = guest_pde->writable;
185 } else if ((shadow_pde_access != PT_ACCESS_NOT_PRESENT) &&
186 (shadow_pde_access != PT_ACCESS_OK)) {
187 // inject page fault in guest
188 if (v3_inject_guest_pf(core, fault_addr, error_code) == -1) {
189 PrintError(info->vm_info, info, "Could not inject guest page fault for vaddr %p\n", (void *)fault_addr);
192 PrintDebug(info->vm_info, info, "Unknown Error occurred (shadow_pde_access=%d)\n", shadow_pde_access);
193 PrintDebug(info->vm_info, info, "Manual Says to inject page fault into guest\n");
198 pte32_t * shadow_pt = NULL;
199 pte32_t * guest_pt = NULL;
201 // Get the next shadow page level, allocate if not present
203 if (shadow_pde_access == PT_ACCESS_NOT_PRESENT) {
204 struct shadow_page_data * shdw_page = create_new_shadow_pt(core);
205 shadow_pt = (pte32_t *)V3_VAddr((void *)shdw_page->page_pa);
207 shadow_pde->present = 1;
208 shadow_pde->user_page = guest_pde->user_page;
211 if (guest_pde->large_page == 0) {
212 shadow_pde->writable = guest_pde->writable;
214 // This large page flag is temporary until we can get a working cache....
215 ((pde32_4MB_t *)guest_pde)->vmm_info = V3_LARGE_PG;
217 if (error_code.write) {
218 shadow_pde->writable = guest_pde->writable;
219 ((pde32_4MB_t *)guest_pde)->dirty = 1;
221 shadow_pde->writable = 0;
222 ((pde32_4MB_t *)guest_pde)->dirty = 0;
227 // VMM Specific options
228 shadow_pde->write_through = guest_pde->write_through;
229 shadow_pde->cache_disable = guest_pde->cache_disable;
230 shadow_pde->global_page = guest_pde->global_page;
233 guest_pde->accessed = 1;
238 shadow_pde->pt_base_addr = PAGE_BASE_ADDR(shdw_page->page_pa);
240 shadow_pt = (pte32_t *)V3_VAddr((void *)BASE_TO_PAGE_ADDR(shadow_pde->pt_base_addr));
245 if (guest_pde->large_page == 0) {
246 if (guest_pa_to_host_va(core, BASE_TO_PAGE_ADDR(guest_pde->pt_base_addr), (addr_t*)&guest_pt) == -1) {
247 // Machine check the guest
248 PrintDebug(info->vm_info, info, "Invalid Guest PTE Address: 0x%p\n", (void *)BASE_TO_PAGE_ADDR(guest_pde->pt_base_addr));
249 v3_raise_exception(core, MC_EXCEPTION);
253 if (handle_pte_shadow_pagefault_32(core, fault_addr, error_code, shadow_pt, guest_pt) == -1) {
254 PrintError(info->vm_info, info, "Error handling Page fault caused by PTE\n");
258 if (handle_4MB_shadow_pagefault_32(core, fault_addr, error_code, shadow_pt, (pde32_4MB_t *)guest_pde) == -1) {
259 PrintError(info->vm_info, info, "Error handling large pagefault\n");
268 static int handle_pte_shadow_pagefault_32(struct guest_info * core, addr_t fault_addr, pf_error_t error_code,
269 pte32_t * shadow_pt, pte32_t * guest_pt) {
271 pt_access_status_t guest_pte_access;
272 pt_access_status_t shadow_pte_access;
273 pte32_t * guest_pte = (pte32_t *)&(guest_pt[PTE32_INDEX(fault_addr)]);;
274 pte32_t * shadow_pte = (pte32_t *)&(shadow_pt[PTE32_INDEX(fault_addr)]);
275 addr_t guest_pa = BASE_TO_PAGE_ADDR((addr_t)(guest_pte->page_base_addr)) + PAGE_OFFSET(fault_addr);
277 struct v3_mem_region * shdw_reg = v3_get_mem_region(core->vm_info, core->vcpu_id, guest_pa);
279 if (shdw_reg == NULL) {
280 // Inject a machine check in the guest
281 PrintDebug(info->vm_info, info, "Invalid Guest Address in page table (0x%p)\n", (void *)guest_pa);
282 v3_raise_exception(core, MC_EXCEPTION);
286 // Check the guest page permissions
287 guest_pte_access = v3_can_access_pte32(guest_pt, fault_addr, error_code);
289 // Check the shadow page permissions
290 shadow_pte_access = v3_can_access_pte32(shadow_pt, fault_addr, error_code);
293 /* Was the page fault caused by the Guest's page tables? */
294 if (v3_is_guest_pf(guest_pte_access, shadow_pte_access) == 1) {
296 PrintDebug(info->vm_info, info, "Access error injecting pf to guest (guest access error=%d) (pf error code=%d)\n",
297 guest_pte_access, *(uint_t*)&error_code);
301 if (v3_inject_guest_pf(core, fault_addr, error_code) == -1) {
302 PrintError(info->vm_info, info, "Could not inject guest page fault for vaddr %p\n", (void *)fault_addr);
311 if (shadow_pte_access == PT_ACCESS_OK) {
312 // Inconsistent state...
313 // Guest Re-Entry will flush page tables and everything should now work
314 PrintDebug(info->vm_info, info, "Inconsistent state... Guest re-entry should flush tlb\n");
319 if (shadow_pte_access == PT_ACCESS_NOT_PRESENT) {
320 // Page Table Entry Not Present
321 PrintDebug(info->vm_info, info, "guest_pa =%p\n", (void *)guest_pa);
323 if ((shdw_reg->host_type == SHDW_REGION_ALLOCATED) ||
324 (shdw_reg->host_type == SHDW_REGION_WRITE_HOOK)) {
325 addr_t shadow_pa = v3_get_shadow_addr(shdw_reg, core->vcpu_id, guest_pa);
327 shadow_pte->page_base_addr = PAGE_BASE_ADDR(shadow_pa);
329 PrintDebug(info->vm_info, info, "\tMapping shadow page (%p)\n", (void *)BASE_TO_PAGE_ADDR(shadow_pte->page_base_addr));
331 shadow_pte->present = guest_pte->present;
332 shadow_pte->user_page = guest_pte->user_page;
334 //set according to VMM policy
335 shadow_pte->write_through = guest_pte->write_through;
336 shadow_pte->cache_disable = guest_pte->cache_disable;
337 shadow_pte->global_page = guest_pte->global_page;
340 guest_pte->accessed = 1;
342 if (guest_pte->dirty == 1) {
343 shadow_pte->writable = guest_pte->writable;
344 } else if ((guest_pte->dirty == 0) && (error_code.write == 1)) {
345 shadow_pte->writable = guest_pte->writable;
346 guest_pte->dirty = 1;
347 } else if ((guest_pte->dirty == 0) && (error_code.write == 0)) {
348 shadow_pte->writable = 0;
353 // Write hooks trump all, and are set Read Only
354 if (shdw_reg->host_type == SHDW_REGION_WRITE_HOOK) {
355 shadow_pte->writable = 0;
359 // Page fault handled by hook functions
361 if (v3_handle_mem_full_hook(core, fault_addr, guest_pa, shdw_reg, error_code) == -1) {
362 PrintError(info->vm_info, info, "Special Page fault handler returned error for address: %p\n", (void *)fault_addr);
366 } else if (shadow_pte_access == PT_ACCESS_WRITE_ERROR) {
367 guest_pte->dirty = 1;
369 if (shdw_reg->host_type == SHDW_REGION_WRITE_HOOK) {
370 if (v3_handle_mem_wr_hook(core, fault_addr, guest_pa, shdw_reg, error_code) == -1) {
371 PrintError(info->vm_info, info, "Special Page fault handler returned error for address: %p\n", (void *)fault_addr);
375 PrintDebug(info->vm_info, info, "Shadow PTE Write Error\n");
376 shadow_pte->writable = guest_pte->writable;
383 // Inject page fault into the guest
384 if (v3_inject_guest_pf(core, fault_addr, error_code) == -1) {
385 PrintError(info->vm_info, info, "Could not inject guest page fault for vaddr %p\n", (void *)fault_addr);
389 PrintError(info->vm_info, info, "PTE Page fault fell through... Not sure if this should ever happen\n");
390 PrintError(info->vm_info, info, "Manual Says to inject page fault into guest\n");
399 static int handle_4MB_shadow_pagefault_32(struct guest_info * core,
400 addr_t fault_addr, pf_error_t error_code,
401 pte32_t * shadow_pt, pde32_4MB_t * large_guest_pde)
403 pt_access_status_t shadow_pte_access = v3_can_access_pte32(shadow_pt, fault_addr, error_code);
404 pte32_t * shadow_pte = (pte32_t *)&(shadow_pt[PTE32_INDEX(fault_addr)]);
405 addr_t guest_fault_pa = BASE_TO_PAGE_ADDR_4MB(large_guest_pde->page_base_addr) + PAGE_OFFSET_4MB(fault_addr);
408 PrintDebug(info->vm_info, info, "Handling 4MB fault (guest_fault_pa=%p) (error_code=%x)\n", (void *)guest_fault_pa, *(uint_t*)&error_code);
409 PrintDebug(info->vm_info, info, "ShadowPT=%p, LargeGuestPDE=%p\n", shadow_pt, large_guest_pde);
411 struct v3_mem_region * shdw_reg = v3_get_mem_region(core->vm_info, core->vcpu_id, guest_fault_pa);
414 if (shdw_reg == NULL) {
415 // Inject a machine check in the guest
416 PrintDebug(info->vm_info, info, "Invalid Guest Address in page table (0x%p)\n", (void *)guest_fault_pa);
417 v3_raise_exception(core, MC_EXCEPTION);
421 if (shadow_pte_access == PT_ACCESS_OK) {
422 // Inconsistent state...
423 // Guest Re-Entry will flush tables and everything should now workd
424 PrintDebug(info->vm_info, info, "Inconsistent state... Guest re-entry should flush tlb\n");
429 if (shadow_pte_access == PT_ACCESS_NOT_PRESENT) {
430 // Get the guest physical address of the fault
432 if ((shdw_reg->host_type == SHDW_REGION_ALLOCATED) ||
433 (shdw_reg->host_type == SHDW_REGION_WRITE_HOOK)) {
434 addr_t shadow_pa = v3_get_shadow_addr(shdw_reg, core->vcpu_id, guest_fault_pa);
436 shadow_pte->page_base_addr = PAGE_BASE_ADDR(shadow_pa);
438 PrintDebug(info->vm_info, info, "\tMapping shadow page (%p)\n", (void *)BASE_TO_PAGE_ADDR(shadow_pte->page_base_addr));
440 shadow_pte->present = 1;
442 /* We are assuming that the PDE entry has precedence
443 * so the Shadow PDE will mirror the guest PDE settings,
444 * and we don't have to worry about them here
447 shadow_pte->user_page = 1;
449 if (shdw_reg->host_type == SHDW_REGION_WRITE_HOOK) {
450 shadow_pte->writable = 0;
452 shadow_pte->writable = 1;
455 //set according to VMM policy
456 shadow_pte->write_through = large_guest_pde->write_through;
457 shadow_pte->cache_disable = large_guest_pde->cache_disable;
458 shadow_pte->global_page = large_guest_pde->global_page;
462 if (v3_handle_mem_full_hook(core, fault_addr, guest_fault_pa, shdw_reg, error_code) == -1) {
463 PrintError(info->vm_info, info, "Special Page Fault handler returned error for address: %p\n", (void *)fault_addr);
467 } else if (shadow_pte_access == PT_ACCESS_WRITE_ERROR) {
469 if (shdw_reg->host_type == SHDW_REGION_WRITE_HOOK) {
471 if (v3_handle_mem_wr_hook(core, fault_addr, guest_fault_pa, shdw_reg, error_code) == -1) {
472 PrintError(info->vm_info, info, "Special Page Fault handler returned error for address: %p\n", (void *)fault_addr);
478 PrintError(info->vm_info, info, "Error in large page fault handler...\n");
479 PrintError(info->vm_info, info, "This case should have been handled at the top level handler\n");
483 PrintDebug(info->vm_info, info, "Returning from large page fault handler\n");
498 /* If we start to optimize we should look up the guest pages in the cache... */
499 static inline int handle_shadow_invlpg_32(struct guest_info * core, addr_t vaddr) {
500 pde32_t * shadow_pd = (pde32_t *)CR3_TO_PDE32_VA(core->ctrl_regs.cr3);
501 pde32_t * shadow_pde = (pde32_t *)&shadow_pd[PDE32_INDEX(vaddr)];
503 addr_t guest_cr3 = CR3_TO_PDE32_PA(core->shdw_pg_state.guest_cr3);
504 pde32_t * guest_pd = NULL;
507 if (guest_pa_to_host_va(core, guest_cr3, (addr_t*)&guest_pd) == -1) {
508 PrintError(info->vm_info, info, "Invalid Guest PDE Address: 0x%p\n", (void *)guest_cr3);
512 guest_pde = (pde32_t *)&(guest_pd[PDE32_INDEX(vaddr)]);
514 if (guest_pde->large_page == 1) {
515 shadow_pde->present = 0;
516 PrintDebug(info->vm_info, info, "Invalidating Large Page\n");
517 } else if (shadow_pde->present == 1) {
518 pte32_t * shadow_pt = (pte32_t *)(addr_t)BASE_TO_PAGE_ADDR_4KB(shadow_pde->pt_base_addr);
519 pte32_t * shadow_pte = (pte32_t *) V3_VAddr( (void*) &shadow_pt[PTE32_INDEX(vaddr)] );
521 PrintDebug(info->vm_info, info, "Setting not present\n");
523 shadow_pte->present = 0;