2 * This file is part of the Palacios Virtual Machine Monitor developed
3 * by the V3VEE Project with funding from the United States National
4 * Science Foundation and the Department of Energy.
6 * The V3VEE Project is a joint project between Northwestern University
7 * and the University of New Mexico. You can find out more at
10 * Copyright (c) 2009, Lei Xia <lxia@northwestern.edu>
11 * Copyright (c) 2009, Chang Seok Bae <jhuell@gmail.com>
12 * Copyright (c) 2009, Jack Lange <jarusl@cs.northwestern.edu>
13 * Copyright (c) 2009, The V3VEE Project <http://www.v3vee.org>
14 * All rights reserved.
16 * Author: Lei Xia <lxia@northwestern.edu>
17 * Chang Seok Bae <jhuell@gmail.com>
18 * Jack Lange <jarusl@cs.northwestern.edu>
20 * This is free software. You are permitted to use,
21 * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
26 #include <palacios/vmm.h>
27 #include <palacios/vmm_types.h>
28 #include <palacios/vmm_io.h>
29 #include <palacios/vmm_intr.h>
30 #include <palacios/vmm_rbtree.h>
32 #include <devices/pci.h>
33 #include <devices/pci_types.h>
37 #define PrintDebug(fmt, args...)
41 #define CONFIG_ADDR_PORT 0x0cf8
42 #define CONFIG_DATA_PORT 0x0cfc
45 #define PCI_BUS_COUNT 1
47 // This must always be a multiple of 8
48 #define MAX_BUS_DEVICES 32
61 } __attribute__((packed));
62 } __attribute__((packed));
63 } __attribute__((packed));
72 // Red Black tree containing all attached devices
73 struct rb_root devices;
75 // Bitmap of the allocated device numbers
76 uint8_t dev_map[MAX_BUS_DEVICES / 8];
82 // Configuration address register
83 struct pci_addr_reg addr_reg;
86 struct pci_bus bus_list[PCI_BUS_COUNT];
92 static void pci_dump_state(struct pci_internal * pci_state);
95 // Scan the dev_map bitmap for the first '0' bit
96 static int get_free_dev_num(struct pci_bus * bus) {
99 for (i = 0; i < sizeof(bus->dev_map); i++) {
100 if (bus->dev_map[i] != 0xff) {
102 for (j = 0; j < 8; j++) {
103 if (!(bus->dev_map[i] & (0x1 << j))) {
113 static void allocate_dev_num(struct pci_bus * bus, int dev_num) {
114 int major = dev_num / 8;
115 int minor = dev_num % 8;
117 bus->dev_map[major] |= (0x1 << minor);
123 struct pci_device * __add_device_to_bus(struct pci_bus * bus, struct pci_device * dev) {
125 struct rb_node ** p = &(bus->devices.rb_node);
126 struct rb_node * parent = NULL;
127 struct pci_device * tmp_dev = NULL;
131 tmp_dev = rb_entry(parent, struct pci_device, dev_tree_node);
133 if (dev->dev_num < tmp_dev->dev_num) {
135 } else if (dev->dev_num > tmp_dev->dev_num) {
142 rb_link_node(&(dev->dev_tree_node), parent, p);
149 struct pci_device * add_device_to_bus(struct pci_bus * bus, struct pci_device * dev) {
151 struct pci_device * ret = NULL;
153 if ((ret = __add_device_to_bus(bus, dev))) {
157 v3_rb_insert_color(&(dev->dev_tree_node), &(bus->devices));
159 allocate_dev_num(bus, dev->dev_num);
165 static struct pci_device * get_device(struct pci_bus * bus, int dev_num) {
166 struct rb_node * n = bus->devices.rb_node;
167 struct pci_device * dev = NULL;
170 dev = rb_entry(n, struct pci_device, dev_tree_node);
172 if (dev_num < dev->dev_num) {
174 } else if (dev_num > dev->dev_num) {
186 static int read_pci_header(struct pci_device * pci_dev, int reg_num, void * dst, int length) {
189 *(uint32_t *)dst = *(uint32_t *)(pci_dev->header_space + reg_num);
190 } else if (length == 2) {
191 *(uint16_t *)dst = *(uint16_t *)(pci_dev->header_space + reg_num);
192 } else if (length == 1) {
193 *(uint8_t *)dst = pci_dev->header_space[reg_num];
195 PrintError("Invalid Read length (%d) for PCI configration header\n", length);
203 static int write_pci_header(struct pci_device * pci_dev, int reg_num, void * src, int length) {
206 *(uint32_t *)(pci_dev->header_space + reg_num) = *(uint32_t *)src;
207 } else if (length == 2) {
208 *(uint16_t *)(pci_dev->header_space + reg_num) = *(uint16_t *)src;
209 } else if (length == 1) {
210 pci_dev->header_space[reg_num] = *(uint8_t *)src;
212 PrintError("Invalid Read length (%d) for PCI configration header\n", length);
216 // This is kind of ugly...
217 if ((reg_num >= 0x10) && (reg_num < 0x27)) {
218 int bar_num = (reg_num & ~0x3) - 0x10;
219 uint32_t val = *(uint32_t *)(pci_dev->header_space + (reg_num & ~0x3));
221 pci_dev->bar_update(pci_dev, bar_num, val);
228 static int addr_port_read(ushort_t port, void * dst, uint_t length, struct vm_device * dev) {
229 struct pci_internal * pci_state = (struct pci_internal *)dev->private_data;
230 int reg_offset = port & 0x3;
231 uint8_t * reg_addr = ((uint8_t *)&(pci_state->addr_reg.val)) + reg_offset;
233 PrintDebug("Reading PCI Address Port (%x): %x\n", port, pci_state->addr_reg.val);
236 if (reg_offset != 0) {
237 PrintError("Invalid Address Port Read\n");
240 *(uint32_t *)dst = *(uint32_t *)reg_addr;
241 } else if (length == 2) {
242 if (reg_offset > 2) {
243 PrintError("Invalid Address Port Read\n");
246 *(uint16_t *)dst = *(uint16_t *)reg_addr;
247 } else if (length == 1) {
248 *(uint8_t *)dst = *(uint8_t *)reg_addr;
250 PrintError("Invalid read length (%d) for PCI address register\n", length);
259 static int addr_port_write(ushort_t port, void * src, uint_t length, struct vm_device * dev) {
260 struct pci_internal * pci_state = (struct pci_internal *)dev->private_data;
261 int reg_offset = port & 0x3;
262 uint8_t * reg_addr = ((uint8_t *)&(pci_state->addr_reg.val)) + reg_offset;
265 if (reg_offset != 0) {
266 PrintError("Invalid Address Port Write\n");
270 *(uint32_t *)reg_addr = *(uint32_t *)src;
271 } else if (length == 2) {
272 if (reg_offset > 2) {
273 PrintError("Invalid Address Port Write\n");
277 *(uint16_t *)reg_addr = *(uint16_t *)src;
278 } else if (length == 1) {
279 *(uint8_t *)reg_addr = *(uint8_t *)src;
281 PrintError("Invalid write length (%d) for PCI address register\n", length);
285 PrintDebug("Writing PCI Address Port(%x): %x\n", port, pci_state->addr_reg.val);
292 static int data_port_read(ushort_t port, void * dst, uint_t length, struct vm_device * vmdev) {
293 struct pci_internal * pci_state = (struct pci_internal *)vmdev->private_data;;
294 struct pci_device * pci_dev = NULL;
295 uint_t reg_num = pci_state->addr_reg.reg_num;
298 PrintDebug("Reading PCI Data register. bus = %d, dev = %d, reg = %d (%x)\n",
299 pci_state->addr_reg.bus_num,
300 pci_state->addr_reg.dev_num,
304 if (port != CONFIG_DATA_PORT) {
305 PrintError("Weird Data port Read: %x\n", port);
309 pci_dev = get_device(&(pci_state->bus_list[0]), pci_state->addr_reg.dev_num);
311 if (pci_dev == NULL) {
312 //*(uint32_t *)dst = 0xffffffff;
314 PrintError("Reading configuration space for non-present device (dev_num=%d)\n",
315 pci_state->addr_reg.dev_num);
321 if (reg_num < 0x40) {
322 return read_pci_header(pci_dev, reg_num, dst, length);
325 if (pci_dev->config_read) {
326 return pci_dev->config_read(pci_dev, reg_num, dst, length);
331 *(uint32_t *)dst = *(uint32_t *)(pci_dev->config_space + reg_num - 0x40);
332 } else if (length == 2) {
333 *(uint16_t *)dst = *(uint16_t *)(pci_dev->config_space + reg_num - 0x40);
334 } else if (length == 1) {
335 *(uint8_t *)dst = pci_dev->config_space[reg_num - 0x40];
337 PrintError("Invalid Read length (%d) for PCI data register", length);
345 static int data_port_write(ushort_t port, void * src, uint_t length, struct vm_device * vmdev) {
346 struct pci_internal * pci_state = (struct pci_internal *)vmdev->private_data;;
347 struct pci_device * pci_dev = NULL;
348 uint_t reg_num = pci_state->addr_reg.reg_num;
351 PrintDebug("Writing PCI Data register. bus = %d, dev = %d, reg = %d (%x)\n",
352 pci_state->addr_reg.bus_num,
353 pci_state->addr_reg.dev_num,
356 if (port != CONFIG_DATA_PORT) {
357 PrintError("Weird Data port Write: %x\n", port);
362 pci_dev = get_device(&(pci_state->bus_list[0]), pci_state->addr_reg.dev_num);
364 if (pci_dev == NULL) {
365 PrintError("Writing configuration space for non-present device (dev_num=%d)\n",
366 pci_state->addr_reg.dev_num);
371 if (reg_num < 0x40) {
372 return write_pci_header(pci_dev, reg_num, src, length);
376 if (pci_dev->config_write) {
377 return pci_dev->config_write(pci_dev, reg_num, src, length);
382 *(uint32_t *)(pci_dev->config_space + reg_num - 0x40) = *(uint32_t *)src;
383 } else if (length == 2) {
384 *(uint16_t *)(pci_dev->config_space + reg_num - 0x40) = *(uint16_t *)src;
385 } else if (length == 1) {
386 pci_dev->config_space[reg_num - 0x40] = *(uint8_t *)src;
388 PrintError("Invalid Write length (%d) for PCI data register", length);
397 static int pci_reset_device(struct vm_device * dev) {
398 PrintDebug("pci: reset device\n");
403 static int pci_start_device(struct vm_device * dev) {
404 PrintDebug("pci: start device\n");
409 static int pci_stop_device(struct vm_device * dev) {
410 PrintDebug("pci: stop device\n");
416 static int pci_deinit_device(struct vm_device * dev) {
419 for (i = 0; i < 4; i++){
420 v3_dev_unhook_io(dev, CONFIG_ADDR_PORT + i);
421 v3_dev_unhook_io(dev, CONFIG_DATA_PORT + i);
430 static int init_i440fx(struct vm_device * dev) {
431 struct pci_device * pci_dev = v3_pci_register_device(dev, 0, "i440FX", 0,
432 NULL, NULL, NULL, NULL);
438 pci_dev->header.vendor_id = 0x8086;
439 pci_dev->header.device_id = 0x1237;
440 pci_dev->header.revision = 0x0002;
441 pci_dev->header.subclass = 0x00; // SubClass: host2pci
442 pci_dev->header.class = 0x06; // Class: PCI bridge
443 pci_dev->header.header_type = 0x00;
445 pci_dev->bus_num = 0;
452 static void init_pci_busses(struct pci_internal * pci_state) {
455 for (i = 0; i < PCI_BUS_COUNT; i++) {
456 pci_state->bus_list[i].bus_num = i;
457 pci_state->bus_list[i].devices.rb_node = NULL;
458 memset(pci_state->bus_list[i].dev_map, 0, sizeof(pci_state->bus_list[i].dev_map));
464 static int pci_init_device(struct vm_device * dev) {
465 struct pci_internal * pci_state = (struct pci_internal *)dev->private_data;;
468 PrintDebug("pci: init_device\n");
471 // dev->vm->pci = dev; //should be in vmm_config.c
473 pci_state->addr_reg.val = 0;
475 init_pci_busses(pci_state);
477 if (init_i440fx(dev) == -1) {
478 PrintError("Could not intialize i440fx\n");
482 for (i = 0; i < 4; i++) {
483 v3_dev_hook_io(dev, CONFIG_ADDR_PORT + i, &addr_port_read, &addr_port_write);
484 v3_dev_hook_io(dev, CONFIG_DATA_PORT + i, &data_port_read, &data_port_write);
491 static struct vm_device_ops dev_ops = {
492 .init = pci_init_device,
493 .deinit = pci_deinit_device,
494 .reset = pci_reset_device,
495 .start = pci_start_device,
496 .stop = pci_stop_device,
500 struct vm_device * v3_create_pci() {
501 struct pci_internal * pci_state = V3_Malloc(sizeof(struct pci_internal));
503 PrintDebug("PCI internal at %p\n",(void *)pci_state);
505 struct vm_device * device = v3_create_device("PCI", &dev_ops, pci_state);
514 // if dev_num == -1, auto assign
515 struct pci_device * v3_pci_register_device(struct vm_device * pci,
519 int (*config_read)(struct pci_device * pci_dev, uint_t reg_num, void * dst, int len),
520 int (*config_write)(struct pci_device * pci_dev, uint_t reg_num, void * src, int len),
521 int (*bar_update)(struct pci_device * pci_dev, uint_t bar_reg, uint32_t val),
522 void * private_data) {
524 struct pci_internal * pci_state = (struct pci_internal *)pci->private_data;
525 struct pci_bus * bus = &(pci_state->bus_list[bus_num]);
526 struct pci_device * pci_dev = NULL;
528 if (dev_num > MAX_BUS_DEVICES) {
529 PrintError("Requested Invalid device number (%d)\n", dev_num);
534 if ((dev_num = get_free_dev_num(bus)) == -1) {
535 PrintError("No more available PCI slots on bus %d\n", bus->bus_num);
540 if (get_device(bus, dev_num) != NULL) {
541 PrintError("PCI Device already registered at slot %d on bus %d\n",
542 dev_num, bus->bus_num);
547 pci_dev = (struct pci_device *)V3_Malloc(sizeof(struct pci_device));
549 if (pci_dev == NULL) {
553 memset(pci_dev, 0, sizeof(struct pci_device));
556 pci_dev->bus_num = bus_num;
557 pci_dev->dev_num = dev_num;
559 strncpy(pci_dev->name, name, sizeof(pci_dev->name));
560 pci_dev->vm_dev = pci;
562 pci_dev->config_read = config_read;
563 pci_dev->config_write = config_write;
564 pci_dev->bar_update = bar_update;
566 pci_dev->priv_data = private_data;
569 add_device_to_bus(bus, pci_dev);
572 pci_dump_state(pci_state);
582 static void pci_dump_state(struct pci_internal * pci_state) {
583 struct rb_node * node = v3_rb_first(&(pci_state->bus_list[0].devices));
584 struct pci_device * tmp_dev = NULL;
586 PrintDebug("===PCI: Dumping state Begin ==========\n");
589 tmp_dev = rb_entry(node, struct pci_device, dev_tree_node);
591 PrintDebug("PCI Device Number: %d (%s):\n", tmp_dev->dev_num, tmp_dev->name);
592 PrintDebug("irq = %d\n", tmp_dev->header.irq_line);
593 PrintDebug("Vend ID: 0x%x\n", tmp_dev->header.vendor_id);
594 PrintDebug("Device ID: 0x%x\n", tnp_dev->header.device_id);
596 } while ((node = v3_rb_next(node)));
598 PrintDebug("====PCI: Dumping state End==========\n");