1 /* (c) 2008, Peter Dinda <pdinda@northwestern.edu> */
2 /* (c) 2008, Jack Lange <jarusl@cs.northwestern.edu> */
3 /* (c) 2008, The V3VEE Project <http://www.v3vee.org> */
8 #include <palacios/vmm_types.h>
11 /* 16 bit guest state */
12 #define VMCS_GUEST_ES_SELECTOR 0x00000800
13 #define VMCS_GUEST_CS_SELECTOR 0x00000802
14 #define VMCS_GUEST_SS_SELECTOR 0x00000804
15 #define VMCS_GUEST_DS_SELECTOR 0x00000806
16 #define VMCS_GUEST_FS_SELECTOR 0x00000808
17 #define VMCS_GUEST_GS_SELECTOR 0x0000080A
18 #define VMCS_GUEST_LDTR_SELECTOR 0x0000080C
19 #define VMCS_GUEST_TR_SELECTOR 0x0000080E
21 /* 16 bit host state */
22 #define VMCS_HOST_ES_SELECTOR 0x00000C00
23 #define VMCS_HOST_CS_SELECTOR 0x00000C02
24 #define VMCS_HOST_SS_SELECTOR 0x00000C04
25 #define VMCS_HOST_DS_SELECTOR 0x00000C06
26 #define VMCS_HOST_FS_SELECTOR 0x00000C08
27 #define VMCS_HOST_GS_SELECTOR 0x00000C0A
28 #define VMCS_HOST_TR_SELECTOR 0x00000C0C
30 /* 64 bit control fields */
31 #define IO_BITMAP_A_ADDR 0x00002000
32 #define IO_BITMAP_A_ADDR_HIGH 0x00002001
33 #define IO_BITMAP_B_ADDR 0x00002002
34 #define IO_BITMAP_B_ADDR_HIGH 0x00002003
35 // Only with "Use MSR Bitmaps" enabled
36 #define MSR_BITMAPS 0x00002004
37 #define MSR_BITMAPS_HIGH 0x00002005
39 #define VM_EXIT_MSR_STORE_ADDR 0x00002006
40 #define VM_EXIT_MSR_STORE_ADDR_HIGH 0x00002007
41 #define VM_EXIT_MSR_LOAD_ADDR 0x00002008
42 #define VM_EXIT_MSR_LOAD_ADDR_HIGH 0x00002009
43 #define VM_ENTRY_MSR_LOAD_ADDR 0x0000200A
44 #define VM_ENTRY_MSR_LOAD_ADDR_HIGH 0x0000200B
45 #define VMCS_EXEC_PTR 0x0000200C
46 #define VMCS_EXEC_PTR_HIGH 0x0000200D
47 #define TSC_OFFSET 0x00002010
48 #define TSC_OFFSET_HIGH 0x00002011
49 // Only with "Use TPR Shadow" enabled
50 #define VIRT_APIC_PAGE_ADDR 0x00002012
51 #define VIRT_APIC_PAGE_ADDR_HIGH 0x00002013
55 /* 64 bit guest state fields */
56 #define VMCS_LINK_PTR 0x00002800
57 #define VMCS_LINK_PTR_HIGH 0x00002801
58 #define GUEST_IA32_DEBUGCTL 0x00002802
59 #define GUEST_IA32_DEBUGCTL_HIGH 0x00002803
62 /* 32 bit control fields */
63 #define PIN_VM_EXEC_CTRLS 0x00004000
64 #define PROC_VM_EXEC_CTRLS 0x00004002
65 #define EXCEPTION_BITMAP 0x00004004
66 #define PAGE_FAULT_ERROR_MASK 0x00004006
67 #define PAGE_FAULT_ERROR_MATCH 0x00004008
68 #define CR3_TARGET_COUNT 0x0000400A
69 #define VM_EXIT_CTRLS 0x0000400C
70 #define VM_EXIT_MSR_STORE_COUNT 0x0000400E
71 #define VM_EXIT_MSR_LOAD_COUNT 0x00004010
72 #define VM_ENTRY_CTRLS 0x00004012
73 #define VM_ENTRY_MSR_LOAD_COUNT 0x00004014
74 #define VM_ENTRY_INT_INFO_FIELD 0x00004016
75 #define VM_ENTRY_EXCEPTION_ERROR 0x00004018
76 #define VM_ENTRY_INSTR_LENGTH 0x0000401A
77 // Only with "Use TPR Shadow" Enabled
78 #define TPR_THRESHOLD 0x0000401C
82 /* 32 bit Read Only data fields */
83 #define VM_INSTR_ERROR 0x00004400
84 #define EXIT_REASON 0x00004402
85 #define VM_EXIT_INT_INFO 0x00004404
86 #define VM_EXIT_INT_ERROR 0x00004406
87 #define IDT_VECTOR_INFO 0x00004408
88 #define IDT_VECTOR_ERROR 0x0000440A
89 #define VM_EXIT_INSTR_LENGTH 0x0000440C
90 #define VMX_INSTR_INFO 0x0000440E
92 /* 32 bit Guest state fields */
93 #define GUEST_ES_LIMIT 0x00004800
94 #define GUEST_CS_LIMIT 0x00004802
95 #define GUEST_SS_LIMIT 0x00004804
96 #define GUEST_DS_LIMIT 0x00004806
97 #define GUEST_FS_LIMIT 0x00004808
98 #define GUEST_GS_LIMIT 0x0000480A
99 #define GUEST_LDTR_LIMIT 0x0000480C
100 #define GUEST_TR_LIMIT 0x0000480E
101 #define GUEST_GDTR_LIMIT 0x00004810
102 #define GUEST_IDTR_LIMIT 0x00004812
103 #define GUEST_ES_ACCESS 0x00004814
104 #define GUEST_CS_ACCESS 0x00004816
105 #define GUEST_SS_ACCESS 0x00004818
106 #define GUEST_DS_ACCESS 0x0000481A
107 #define GUEST_FS_ACCESS 0x0000481C
108 #define GUEST_GS_ACCESS 0x0000481E
109 #define GUEST_LDTR_ACCESS 0x00004820
110 #define GUEST_TR_ACCESS 0x00004822
111 #define GUEST_INT_STATE 0x00004824
112 #define GUEST_ACTIVITY_STATE 0x00004826
113 #define GUEST_SMBASE 0x00004828
114 #define GUEST_IA32_SYSENTER_CS 0x0000482A
117 /* 32 bit host state field */
118 #define HOST_IA32_SYSENTER_CS 0x00004C00
120 /* Natural Width Control Fields */
121 #define CR0_GUEST_HOST_MASK 0x00006000
122 #define CR4_GUEST_HOST_MASK 0x00006002
123 #define CR0_READ_SHADOW 0x00006004
124 #define CR4_READ_SHADOW 0x00006006
125 #define CR3_TARGET_VALUE_0 0x00006008
126 #define CR3_TARGET_VALUE_1 0x0000600A
127 #define CR3_TARGET_VALUE_2 0x0000600C
128 #define CR3_TARGET_VALUE_3 0x0000600E
131 /* Natural Width Read Only Fields */
132 #define EXIT_QUALIFICATION 0x00006400
133 #define IO_RCX 0x00006402
134 #define IO_RSI 0x00006404
135 #define IO_RDI 0x00006406
136 #define IO_RIP 0x00006408
137 #define GUEST_LINEAR_ADDR 0x0000640A
139 /* Natural Width Guest State Fields */
140 #define GUEST_CR0 0x00006800
141 #define GUEST_CR3 0x00006802
142 #define GUEST_CR4 0x00006804
143 #define GUEST_ES_BASE 0x00006806
144 #define GUEST_CS_BASE 0x00006808
145 #define GUEST_SS_BASE 0x0000680A
146 #define GUEST_DS_BASE 0x0000680C
147 #define GUEST_FS_BASE 0x0000680E
148 #define GUEST_GS_BASE 0x00006810
149 #define GUEST_LDTR_BASE 0x00006812
150 #define GUEST_TR_BASE 0x00006814
151 #define GUEST_GDTR_BASE 0x00006816
152 #define GUEST_IDTR_BASE 0x00006818
153 #define GUEST_DR7 0x0000681A
154 #define GUEST_RSP 0x0000681C
155 #define GUEST_RIP 0x0000681E
156 #define GUEST_RFLAGS 0x00006820
157 #define GUEST_PENDING_DEBUG_EXCS 0x00006822
158 #define GUEST_IA32_SYSENTER_ESP 0x00006824
159 #define GUEST_IA32_SYSENTER_EIP 0x00006826
162 /* Natural Width Host State Fields */
163 #define HOST_CR0 0x00006C00
164 #define HOST_CR3 0x00006C02
165 #define HOST_CR4 0x00006C04
166 #define HOST_FS_BASE 0x00006C06
167 #define HOST_GS_BASE 0x00006C08
168 #define HOST_TR_BASE 0x00006C0A
169 #define HOST_GDTR_BASE 0x00006C0C
170 #define HOST_IDTR_BASE 0x00006C0E
171 #define HOST_IA32_SYSENTER_ESP 0x00006C10
172 #define HOST_IA32_SYSENTER_EIP 0x00006C12
173 #define HOST_RSP 0x00006C14
174 #define HOST_RIP 0x00006C16
176 /* Pin Based VM Execution Controls */
177 /* INTEL MANUAL: 20-10 vol 3B */
178 #define EXTERNAL_INTERRUPT_EXITING 0x00000001
179 #define NMI_EXITING 0x00000008
180 #define VIRTUAL_NMIS 0x00000020
183 /* Processor Based VM Execution Controls */
184 /* INTEL MANUAL: 20-11 vol. 3B */
185 #define INTERRUPT_WINDOWS_EXIT 0x00000004
186 #define USE_TSC_OFFSETTING 0x00000008
187 #define HLT_EXITING 0x00000080
188 #define INVLPG_EXITING 0x00000200
189 #define MWAIT_EXITING 0x00000400
190 #define RDPMC_EXITING 0x00000800
191 #define RDTSC_EXITING 0x00001000
192 #define CR8_LOAD_EXITING 0x00080000
193 #define CR8_STORE_EXITING 0x00100000
194 #define USE_TPR_SHADOW 0x00200000
195 #define NMI_WINDOW_EXITING 0x00400000
196 #define MOVDR_EXITING 0x00800000
197 #define UNCONDITION_IO_EXITING 0x01000000
198 #define USE_IO_BITMAPS 0x02000000
199 #define USE_MSR_BITMAPS 0x10000000
200 #define MONITOR_EXITING 0x20000000
201 #define PAUSE_EXITING 0x40000000
203 /* VM-Exit Controls */
204 /* INTEL MANUAL: 20-16 vol. 3B */
205 #define HOST_ADDR_SPACE_SIZE 0x00000200
206 #define ACK_IRQ_ON_EXIT 0x00008000
209 #define VM_EXIT_REASON_INFO_EXCEPTION_OR_NMI 0
210 #define VM_EXIT_REASON_EXTERNAL_INTR 1
211 #define VM_EXIT_REASON_TRIPLE_FAULT 2
212 #define VM_EXIT_REASON_INIT_SIGNAL 3
213 #define VM_EXIT_REASON_STARTUP_IPI 4
214 #define VM_EXIT_REASON_IO_SMI 5
215 #define VM_EXIT_REASON_OTHER_SMI 6
216 #define VM_EXIT_REASON_INTR_WINDOW 7
217 #define VM_EXIT_REASON_NMI_WINDOW 8
218 #define VM_EXIT_REASON_TASK_SWITCH 9
219 #define VM_EXIT_REASON_CPUID 10
220 #define VM_EXIT_REASON_HLT 12
221 #define VM_EXIT_REASON_INVD 13
222 #define VM_EXIT_REASON_INVLPG 14
223 #define VM_EXIT_REASON_RDPMC 15
224 #define VM_EXIT_REASON_RDTSC 16
225 #define VM_EXIT_REASON_RSM 17
226 #define VM_EXIT_REASON_VMCALL 18
227 #define VM_EXIT_REASON_VMCLEAR 19
228 #define VM_EXIT_REASON_VMLAUNCH 20
229 #define VM_EXIT_REASON_VMPTRLD 21
230 #define VM_EXIT_REASON_VMPTRST 22
231 #define VM_EXIT_REASON_VMREAD 23
232 #define VM_EXIT_REASON_VMRESUME 24
233 #define VM_EXIT_REASON_VMWRITE 25
234 #define VM_EXIT_REASON_VMXOFF 26
235 #define VM_EXIT_REASON_VMXON 27
236 #define VM_EXIT_REASON_CR_REG_ACCESSES 28
237 #define VM_EXIT_REASON_MOV_DR 29
238 #define VM_EXIT_REASON_IO_INSTR 30
239 #define VM_EXIT_REASON_RDMSR 31
240 #define VM_EXIT_REASON_WRMSR 32
241 #define VM_EXIT_REASON_ENTRY_FAIL_INVALID_GUEST_STATE 33
242 #define VM_EXIT_REASON_ENTRY_FAIL_MSR_LOAD 34
243 #define VM_EXIT_REASON_MWAIT 36
244 #define VM_EXIT_REASON_MONITOR 39
245 #define VM_EXIT_REASON_PAUSE 40
246 #define VM_EXIT_REASON_ENTRY_FAILURE_MACHINE_CHECK 41
247 #define VM_EXIT_REASON_TPR_BELOW_THRESHOLD 43
250 extern char *exception_names[];
251 extern char *exception_type_names[];
262 #define PACKED __attribute__((packed))
267 /* VMCS Exit QUALIFICATIONs */
268 struct VMExitIOQual {
269 uint_t accessSize : 3 PACKED; // (0: 1 Byte ;; 1: 2 Bytes ;; 3: 4 Bytes)
270 uint_t dir : 1 PACKED; // (0: Out ;; 1: In)
271 uint_t string : 1 PACKED; // (0: not string ;; 1: string)
272 uint_t REP : 1 PACKED; // (0: not REP ;; 1: REP)
273 uint_t opEnc : 1 PACKED; // (0: DX ;; 1: immediate)
274 uint_t rsvd : 9 PACKED; // Set to 0
275 uint_t port : 16 PACKED; // IO Port Number
280 struct VMExitDBGQual {
281 uint_t B0 : 1 PACKED; // Breakpoint 0 condition met
282 uint_t B1 : 1 PACKED; // Breakpoint 1 condition met
283 uint_t B2 : 1 PACKED; // Breakpoint 2 condition met
284 uint_t B3 : 1 PACKED; // Breakpoint 3 condition met
285 uint_t rsvd : 9 PACKED; // reserved to 0
286 uint_t BD : 1 PACKED; // detected DBG reg access
287 uint_t BS : 1 PACKED; // cause either single instr or taken branch
291 struct VMExitTSQual {
292 uint_t selector : 16 PACKED; // selector of destination TSS
293 uint_t rsvd : 14 PACKED; // reserved to 0
294 uint_t src : 2 PACKED; // (0: CALL ; 1: IRET ; 2: JMP ; 3: Task gate in IDT)
297 struct VMExitCRQual {
298 uint_t crID : 4 PACKED; // cr number (0 for CLTS and LMSW) (bit 3 always 0, on 32bit)
299 uint_t accessType : 2 PACKED; // (0: MOV to CR ; 1: MOV from CR ; 2: CLTS ; 3: LMSW)
300 uint_t lmswOpType : 1 PACKED; // (0: register ; 1: memory)
301 uint_t rsvd1 : 1 PACKED; // reserved to 0
302 uint_t gpr : 4 PACKED; // (0:RAX+[CLTS/LMSW], 1:RCX, 2:RDX, 3:RBX, 4:RSP, 5:RBP, 6:RSI, 6:RDI, 8-15:64bit regs)
303 uint_t rsvd2 : 4 PACKED; // reserved to 0
304 uint_t lmswSrc : 16 PACKED; // src data for lmsw
307 struct VMExitMovDRQual {
308 uint_t regID : 3 PACKED; // debug register number
309 uint_t rsvd1 : 1 PACKED; // reserved to 0
310 uint_t dir : 1 PACKED; // (0: MOV to DR , 1: MOV from DR)
311 uint_t rsvd2 : 3 PACKED; // reserved to 0
312 uint_t gpr : 4 PACKED; // (0:RAX, 1:RCX, 2:RDX, 3:RBX, 4:RSP, 5:RBP, 6:RSI, 6:RDI, 8-15:64bit regs)
315 /* End Exit Qualifications */
317 /* Exit Vector Info */
318 struct VMExitIntInfo {
319 uint_t nr : 8 PACKED; // IRQ number, exception vector, NMI = 2
320 uint_t type : 3 PACKED; // (0: ext. IRQ , 2: NMI , 3: hw exception , 6: sw exception
321 uint_t errorCode : 1 PACKED; // 1: error Code present
322 uint_t iret : 1 PACKED; // something to do with NMIs and IRETs (Intel 3B, sec. 23.2.2)
323 uint_t rsvd : 18 PACKED; // always 0
324 uint_t valid : 1 PACKED; // always 1 if valid
330 /* End Exit Vector Info */
335 /* Segment Selector Access Rights (32 bits) */
336 /* INTEL Manual: 20-4 vol 3B */
340 uint_t descType : 1 PACKED;
341 uint_t dpl : 2 PACKED;
342 uint_t present : 1 PACKED;
343 uchar_t rsvd1 PACKED;
344 uint_t avail : 1 PACKED ;
345 uint_t L : 1 PACKED ; // CS only (64 bit active), reserved otherwise
346 uint_t DB : 1 PACKED ;
347 uint_t granularity : 1 PACKED ;
348 uint_t unusable : 1 PACKED ;
349 uint_t rsvd2 : 15 PACKED ;
357 union SegAccess access;
359 uint_t baseAddr ; // should be 64 bits?
364 struct VMCSGuestStateArea {
365 /* (1) Guest State Area */
366 /* (1.1) Guest Register State */
367 uint_t cr0 ; // should be 64 bits?
368 uint_t cr3 ; // should be 64 bits?
369 uint_t cr4 ; // should be 64 bits?
370 uint_t dr7 ; // should be 64 bits?
371 uint_t rsp ; // should be 64 bits?
372 uint_t rip ; // should be 64 bits?
373 uint_t rflags ; // should be 64 bits?
376 struct VMCSSegment cs ;
377 struct VMCSSegment ss ;
378 struct VMCSSegment ds ;
379 struct VMCSSegment es ;
380 struct VMCSSegment fs ;
381 struct VMCSSegment gs ;
382 struct VMCSSegment ldtr ;
383 struct VMCSSegment tr ;
385 struct VMCSSegment gdtr ;
386 struct VMCSSegment idtr ;
391 ullong_t sysenter_esp ; // should be 64 bits?
392 ullong_t sysenter_eip ; // should be 64 bits?
396 /* (1.2) Guest Non-register State */
397 uint_t activity ; /* (0=Active, 1=HLT, 2=Shutdown, 3=Wait-for-SIPI)
398 (listed in MSR: IA32_VMX_MISC) */
400 uint_t interrupt_state ; // see Table 20-3 (page 20-6) INTEL MANUAL 3B
402 ullong_t pending_dbg_exceptions ; // should be 64 bits?
403 /* Table 20-4 page 20-8 INTEL MANUAL 3B */
405 ullong_t vmcs_link ; // should be set to 0xffffffff_ffffffff
409 int CopyOutVMCSGuestStateArea(struct VMCSGuestStateArea *p);
410 int CopyInVMCSGuestStateArea(struct VMCSGuestStateArea *p);
414 struct VMCSHostStateArea {
415 /* (2) Host State Area */
416 ullong_t cr0 ; // Should be 64 bits?
417 ullong_t cr3 ; // should be 64 bits?
418 ullong_t cr4 ; // should be 64 bits?
419 ullong_t rsp ; // should be 64 bits?
420 ullong_t rip ; // should be 64 bits?
422 ushort_t csSelector ;
423 ushort_t ssSelector ;
424 ushort_t dsSelector ;
425 ushort_t esSelector ;
426 ushort_t fsSelector ;
427 ushort_t gsSelector ;
428 ushort_t trSelector ;
430 ullong_t fsBaseAddr ; // Should be 64 bits?
431 ullong_t gsBaseAddr ; // Should be 64 bits?
432 ullong_t trBaseAddr ; // Should be 64 bits?
433 ullong_t gdtrBaseAddr ; // Should be 64 bits?
434 ullong_t idtrBaseAddr ; // Should be 64 bits?
439 ullong_t sysenter_esp ; // Should be 64 bits?
440 ullong_t sysenter_eip ; // Should be 64 bits?
444 int CopyOutVMCSHostStateArea(struct VMCSHostStateArea *p);
445 int CopyInVMCSHostStateArea(struct VMCSHostStateArea *p);
448 struct VMCSExecCtrlFields {
449 uint_t pinCtrls ; // Table 20-5, Vol 3B. (pg. 20-10)
450 uint_t procCtrls ; // Table 20-6, Vol 3B. (pg. 20-11)
452 uint_t pageFaultErrorMask ;
453 uint_t pageFaultErrorMatch ;
457 uint_t cr0GuestHostMask ; // Should be 64 bits?
458 uint_t cr0ReadShadow ; // Should be 64 bits?
459 uint_t cr4GuestHostMask ; // Should be 64 bits?
460 uint_t cr4ReadShadow ; // Should be 64 bits?
461 uint_t cr3TargetValue0 ; // should be 64 bits?
462 uint_t cr3TargetValue1 ; // should be 64 bits?
463 uint_t cr3TargetValue2 ; // should be 64 bits?
464 uint_t cr3TargetValue3 ; // should be 64 bits?
465 uint_t cr3TargetCount ;
469 /* these fields enabled if "use TPR shadow"==1 */
470 /* may not need them */
471 ullong_t virtApicPageAddr ;
472 // uint_t virtApicPageAddrHigh
473 uint_t tprThreshold ;
476 ullong_t MSRBitmapsBaseAddr;
479 ullong_t vmcsExecPtr ;
483 int CopyOutVMCSExecCtrlFields(struct VMCSExecCtrlFields *p);
484 int CopyInVMCSExecCtrlFields(struct VMCSExecCtrlFields *p);
489 struct VMCSExitCtrlFields {
490 uint_t exitCtrls ; // Table 20-7, Vol. 3B (pg. 20-16)
491 uint_t msrStoreCount ;
492 ullong_t msrStoreAddr ;
493 uint_t msrLoadCount ;
494 ullong_t msrLoadAddr ;
497 int CopyOutVMCSExitCtrlFields(struct VMCSExitCtrlFields *p);
498 int CopyInVMCSExitCtrlFields(struct VMCSExitCtrlFields *p);
502 struct VMCSEntryCtrlFields {
503 uint_t entryCtrls ; // Table 20-9, Vol. 3B (pg. 20-18)
504 uint_t msrLoadCount ;
505 ullong_t msrLoadAddr ;
506 uint_t intInfo ; // Table 20-10, Vol. 3B (pg. 20-19)
507 uint_t exceptionErrorCode ;
512 int CopyOutVMCSEntryCtrlFields(struct VMCSEntryCtrlFields *p);
513 int CopyInVMCSEntryCtrlFields(struct VMCSEntryCtrlFields *p);
516 struct VMCSExitInfoFields {
517 uint_t reason; // Table 20-11, Vol. 3B (pg. 20-20)
518 uint_t qualification ; // Should be 64 bits?
520 uint_t intErrorCode ;
521 uint_t idtVectorInfo ;
522 uint_t idtVectorErrorCode ;
524 ullong_t guestLinearAddr ; // Should be 64 bits?
526 ullong_t ioRCX ; // Should be 64 bits?
527 ullong_t ioRSI ; // Should be 64 bits?
528 ullong_t ioRDI ; // Should be 64 bits?
529 ullong_t ioRIP ; // Should be 64 bits?
530 uint_t instrErrorField ;
535 int CopyOutVMCSExitInfoFields(struct VMCSExitInfoFields *p);
542 uint_t exitCtrlFlags;
543 struct VMCSGuestStateArea guestStateArea ;
544 struct VMCSHostStateArea hostStateArea ;
545 struct VMCSExecCtrlFields execCtrlFields ;
546 struct VMCSExitCtrlFields exitCtrlFields ;
547 struct VMCSEntryCtrlFields entryCtrlFields ;
548 struct VMCSExitInfoFields exitInfoFields ;
552 int CopyOutVMCSData(struct VMCSData *p);
553 int CopyInVMCSData(struct VMCSData *p);
566 void PrintTrace_VMX_Regs(struct VMXRegs *regs);
567 void PrintTrace_VMCSData(struct VMCSData * vmcs);
568 void PrintTrace_VMCSGuestStateArea(struct VMCSGuestStateArea * guestState);
569 void PrintTrace_VMCSHostStateArea(struct VMCSHostStateArea * hostState);
570 void PrintTrace_VMCSExecCtrlFields(struct VMCSExecCtrlFields * execCtrls);
571 void PrintTrace_VMCSExitCtrlFields(struct VMCSExitCtrlFields * exitCtrls);
572 void PrintTrace_VMCSEntryCtrlFields(struct VMCSEntryCtrlFields * entryCtrls);
573 void PrintTrace_VMCSExitInfoFields(struct VMCSExitInfoFields * exitInfo);
574 void PrintTrace_VMCSSegment(char * segname, struct VMCSSegment * seg, int abbr);
577 extern uint_t VMCS_WRITE();
578 extern uint_t VMCS_READ();
580 //uint_t VMCSRead(uint_t tag, void * val);
583 #include <palacios/vmcs_gen.h>