4 #include <geekos/malloc.h>
6 #define NE2K_PAGE0 0x00
7 #define NE2K_PAGE1 0x40
8 #define NE2K_PAGE2 0x80
9 #define NE2K_PAGE3 0xc0
11 #define NE2K_BASE_ADDR 0xc100 /* Starting address of the card */
12 #define NE2K_CR NE2K_BASE_ADDR /* Command register */
13 #define NE2K_DATAPORT (NE2K_CR + 0x10)
14 #define NE2K_RESET (NE2K_CR + 0x1f)
16 /* Page 0 register offsets */
17 #define NE2K CLDA0 (NE2K_CR + 0x01)
18 #define NE2K_PSTART (NE2K_CR + 0x01) /* Page start register */
19 #define NE2K_CLDA1 (NE2K_CR + 0x02)
20 #define NE2K_PSTOP (NE2K_CR + 0x02) /* Page stop register */
21 #define NE2K_BNRY (NE2K_CR + 0x03) /* Boundary register */
22 #define NE2K_TSR (NE2K_CR + 0x04)
23 #define NE2K_TPSR (NE2K_CR + 0x04)
24 #define NE2K_NCR (NE2K_CR + 0x05)
25 #define NE2K_TBCR0 (NE2K_CR + 0x05)
26 #define NE2K_FIFO (NE2K_CR + 0x06)
27 #define NE2K_TBCR1 (NE2K_CR + 0x06)
28 #define NE2K_ISR (NE2K_CR + 0x07) /* Interrupt status register */
29 #define NE2K_CRDA0 (NE2K_CR + 0x08)
30 #define NE2K_RSAR0 (NE2K_CR + 0x08) /* Remote start address registers */
31 #define NE2K_CRDA1 (NE2K_CR + 0x09)
32 #define NE2K_RSAR1 (NE2K_CR + 0x09)
33 #define NE2K_RBCR0 (NE2K_CR + 0x0a) /* Remote byte count registers */
34 #define NE2K_RBCR1 (NE2K_CR + 0x0b)
35 #define NE2K_RSR (NE2K_CR + 0x0c)
36 #define NE2K_RCR (NE2K_CR + 0x0c) /* Receive configuration register */
37 #define NE2K_CNTR0 (NE2K_CR + 0x0d)
38 #define NE2K_TCR (NE2K_CR + 0x0d) /* Transmit configuration register */
39 #define NE2K_CNTR1 (NE2K_CR + 0x0e)
40 #define NE2K_DCR (NE2K_CR + 0x0e) /* Data configuration register */
41 #define NE2K_CNTR2 (NE2K_CR + 0x0f)
42 #define NE2K_IMR (NE2K_CR + 0x0f) /* Interrupt mask register */
44 /* Page 1 register offsets */
45 #define NE2K_PAR0 (NE2K_CR + 0x01)
46 #define NE2K_PAR1 (NE2K_CR + 0x02)
47 #define NE2K_PAR2 (NE2K_CR + 0x03)
48 #define NE2K_PAR3 (NE2K_CR + 0x04)
49 #define NE2K_PAR4 (NE2K_CR + 0x05)
50 #define NE2K_PAR5 (NE2K_CR + 0x06)
51 #define NE2K_CURR (NE2K_CR + 0x07)
52 #define NE2K_MAR0 (NE2K_CR + 0x08)
53 #define NE2K_MAR1 (NE2K_CR + 0x09)
54 #define NE2K_MAR2 (NE2K_CR + 0x0a)
55 #define NE2K_MAR3 (NE2K_CR + 0x0b)
56 #define NE2K_MAR4 (NE2K_CR + 0x0c)
57 #define NE2K_MAR5 (NE2K_CR + 0x0d)
58 #define NE2K_MAR6 (NE2K_CR + 0x0e)
59 #define NE2K_MAR7 (NE2K_CR + 0x0f)
61 #define NE2K_IRQ 11 /* Interrupt channel */
74 struct _CR { //COMMAND REG
75 uint_t stp: 1; //STOP- software reset
76 uint_t sta: 1; //START- activates NIC
77 uint_t txp: 1; //TRANSMIT- set to send
78 uint_t rd: 3; //REMOTE DMA
79 uint_t ps: 2; //PAGE SELECT
80 }__attribute__((__packed__)) __attribute__((__aligned__(1)));
82 struct _ISR{ //INTERRUPT STATUS REG
83 uint_t prx: 1; //PACKET RECIEVED
84 uint_t ptx: 1; //PACKET TRANSMITTED
85 uint_t rxe: 1; //TRANSMIT ERROR
86 uint_t txe: 1; //RECEIVE ERROR
87 uint_t ovw: 1; //OVERWRITE WARNING
88 uint_t cnt: 1; //COUNTER OVERFLOW
89 uint_t rdc: 1; //REMOTE DMA COMPLETE
90 uint_t rst: 1; //RESET STATUS
91 }__attribute__((__packed__)) __attribute__((__aligned__(1)));
93 struct _IMR { //INTERRUPT MASK REG
94 uint_t prxe: 1; //PACKET RX INTRPT
95 uint_t ptxe: 1; //PACKET TX INTRPT
96 uint_t rxee: 1; //RX ERROR INTRPT
97 uint_t txee: 1; //TX ERROR INTRPt
98 uint_t ovwe: 1; //OVERWRITE WARNING INTRPT
99 uint_t cnte: 1; //COUNTER OVERFLOW INTRPT
100 uint_t rdce: 1; //DMA COMLETE INTRPT
102 }__attribute__((__packed__)) __attribute__((__aligned__(1)));
104 struct _DCR { //DATA CONFIG REGISTER
105 uint_t wts: 1; //WORD TRANSFER SELECT
106 uint_t bos: 1; //BYTE ORDER SELECT
107 uint_t las: 1; //LONG ADDR SELECT
108 uint_t ls: 1; //LOOPBACK SELECT
109 uint_t arm: 1; //AUTO-INITIALIZE REMOTE
110 uint_t ft: 2; //FIFO THRESH SELECT
111 }__attribute__((__packed__)) __attribute__((__aligned__(1)));
113 struct _TCR { //TX CONFIG REGISTER
114 uint_t crc: 1; //INHIBIT CRC
115 uint_t lb: 2; //ENCODED LOOPBACK
116 uint_t atd: 1; //AUTO TRANSMIT
117 uint_t ofst: 1; //COLLISION OFFSET ENABLE
119 }__attribute__((__packed__)) __attribute__((__aligned__(1)));
122 uint_t ptx: 1; //PACKET TX
124 uint_t col: 1; //TX COLLIDED
125 uint_t abt: 1; //TX ABORTED
126 uint_t crs: 1; //CARRIER SENSE LOST
127 uint_t fu: 1; //FIFO UNDERRUN
128 uint_t cdh: 1; //CD HEARTBEAT
129 uint_t owc: 1; //OUT OF WINDOW COLLISION
130 }__attribute__((__packed__)) __attribute__((__aligned__(1)));
132 struct _RCR { //RECEIVE CONFIGURATION REGISTER
133 uint_t sep: 1; //SAVE ERRORED PACKETS
134 uint_t ar: 1; //ACCEPT RUNT PACKETS
135 uint_t ab: 1; //ACCEPT BROADCAST
136 uint_t am: 1; //ACCEPT MULTICAST
137 uint_t pro: 1; //PROMISCUOUS PHYSICAL
138 uint_t mon: 1; //MONITOR MODE
140 }__attribute__((__packed__)) __attribute__((__aligned__(1)));
142 struct _RSR { //RECEIVE STATUS REG
143 uint_t prx: 1; //PACKET RX INTACT
144 uint_t crc: 1; //CRC ERROR
145 uint_t fae: 1; //FRAME ALIGNMENT ERROR
146 uint_t fo: 1; //FIFO OVERRUN
147 uint_t mpa: 1; //MISSED PACKET
148 uint_t phy: 1; //PHYSICAL/MULTICAST ADDR
149 uint_t dis: 1; //RX DISABLED
150 uint_t dfr: 1; //DEFERRING
151 }__attribute__((__packed__)) __attribute__((__aligned__(1)));
153 struct NE2K_Packet_Info {
162 int NE2K_Transmit(uint_t size);
163 int NE2K_Send_Packet(uchar_t *packet, uint_t size);
164 int NE2K_Send(uchar_t src[], uchar_t dest[], uint_t type, uchar_t *data, uint_t size);
166 #endif /* GEEKOS_NE2K_H */