2 * This file is part of the Palacios Virtual Machine Monitor developed
3 * by the V3VEE Project with funding from the United States National
4 * Science Foundation and the Department of Energy.
6 * The V3VEE Project is a joint project between Northwestern University
7 * and the University of New Mexico. You can find out more at
10 * Copyright (c) 2009, Lei Xia <lxia@northwestern.edu>
11 * Copyright (c) 2009, Chang Seok Bae <jhuell@gmail.com>
12 * Copyright (c) 2009, The V3VEE Project <http://www.v3vee.org>
13 * All rights reserved.
15 * Author: Lei Xia <lxia@northwestern.edu>
16 * Chang Seok Bae <jhuell@gmail.com>
18 * This is free software. You are permitted to use,
19 * redistribute, and modify it as specified in the file "V3VEE_LICENSE".
25 #include <palacios/vm_dev.h>
26 #include <palacios/vmm_types.h>
28 #define PROG_INTERFACE(x) ((x)[0])
29 #define SUBCLASS(x) ((x)[1])
30 #define CLASSCODE(x) ((x)[2])
32 #define HEADER_TYPE(x) ((x)&0x7f)
34 #define PCI_DEVICE 0x0
36 #define IS_DEVICE(x) (HEADER_TYPE(x)==0x0)
38 #define IS_IO_ADDR(x) ((x)&0x1)
39 #define IS_MEM_ADDR(x) (!((x)&0x1))
40 #define GET_IO_ADDR(x) (((uint_t)(x))&0xfffffffc)
41 #define GET_MEM_ADDR(x) (((uint_t)(x))&0xfffffff0)
42 #define GET_MEM_TYPE(x) (((x)&0x6)>>2)
44 #define PCI_CONFIG_ADDRESS 0xcf8 // 32 bit, little endian
45 #define PCI_CONFIG_DATA 0xcfc // 32 bit, little endian
47 #define PCI_IO_REGIONS 6
49 struct pci_device_config {
55 uchar_t class_code[3]; // in order: programming interface, subclass, class code
56 uchar_t cache_line_size;
58 uchar_t header_type; // bits 6-0: 00: other, 01: pci-pci bridge, 02: pci-cardbus; bit 7: 1=multifunction
61 uint32_t cardbus_cis_pointer;
62 uint16_t subsystem_vendor_id;
63 uint16_t subsystem_id;
64 uint32_t expansion_rom_address;
65 uchar_t cap_ptr; // capabilities list offset in config space
67 uchar_t intr_line; // 00=none, 01=IRQ1, etc.
68 uchar_t intr_pin; // 00=none, otherwise INTA# to INTD#
69 uchar_t min_grant; // min busmaster time - units of 250ns
70 uchar_t max_latency; // units of 250ns - busmasters
71 uint32_t device_data[48];
76 typedef void pci_mapioregion_fn(struct pci_device *pci_dev, int region_num,
77 uint32_t addr, uint32_t size, int type);
79 typedef int port_read_fn(ushort_t port, void * dst, uint_t length, struct vm_device *vmdev);
80 typedef int port_write_fn(ushort_t port, void * src, uint_t length, struct vm_device *vmdev);
82 #define PCI_ADDRESS_SPACE_MEM 0x00
83 #define PCI_ADDRESS_SPACE_IO 0x01
84 #define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08
87 uint32_t addr; //current PCI mapping address. -1 means not mapped
88 uint32_t size; //actual ports/memories needed by device
89 uint32_t mapped_size; //mapped size, usually bigger than needed size, -1 not mapped
91 uchar_t reg_num; //correponding to which BAR register it is
92 pci_mapioregion_fn *map_func;
94 port_read_fn **port_reads; //array of read functions, hooked for each port in order, if NULL, do not hook that port
95 port_write_fn **port_writes;
100 struct pci_device_config config;
102 struct pci_device *next;
109 void (*raise_irq)(struct pci_device *dev, void *data);
110 void (*config_write)(struct pci_device *pci_dev, uchar_t addr, uint32_t val, int len);
111 uint32_t (*config_read)(struct pci_device *pci_dev, uchar_t addr, int len);
114 struct pci_ioregion *ioregion[PCI_IO_REGIONS];
119 struct pci_class_desc {
124 static struct pci_class_desc pci_class_descriptions[] =
126 { 0x0100, "SCSI controller"},
127 { 0x0101, "IDE controller"},
128 { 0x0102, "Floppy controller"},
129 { 0x0103, "IPI controller"},
130 { 0x0104, "RAID controller"},
131 { 0x0106, "SATA controller"},
132 { 0x0107, "SAS controller"},
133 { 0x0180, "Storage controller"},
134 { 0x0200, "Ethernet controller"},
135 { 0x0201, "Token Ring controller"},
136 { 0x0202, "FDDI controller"},
137 { 0x0203, "ATM controller"},
138 { 0x0280, "Network controller"},
139 { 0x0300, "VGA controller"},
140 { 0x0301, "XGA controller"},
141 { 0x0302, "3D controller"},
142 { 0x0380, "Display controller"},
143 { 0x0400, "Video controller"},
144 { 0x0401, "Audio controller"},
146 { 0x0480, "Multimedia controller"},
147 { 0x0500, "RAM controller"},
148 { 0x0501, "Flash controller"},
149 { 0x0580, "Memory controller"},
150 { 0x0600, "Host bridge"},
151 { 0x0601, "ISA bridge"},
152 { 0x0602, "EISA bridge"},
153 { 0x0603, "MC bridge"},
154 { 0x0604, "PCI bridge"},
155 { 0x0605, "PCMCIA bridge"},
156 { 0x0606, "NUBUS bridge"},
157 { 0x0607, "CARDBUS bridge"},
158 { 0x0608, "RACEWAY bridge"},
160 { 0x0c03, "USB controller"},
165 struct vm_device *v3_create_vpci();