2 * linux/arch/x86_64/kernel/i387.c
4 * Copyright (C) 1994 Linus Torvalds
5 * Copyright (C) 2002 Andi Kleen, SuSE Labs
7 * Pentium III FXSR, SSE support
8 * General FPU state handling cleanups
9 * Gareth Hughes <gareth@valinux.com>, May 2000
11 * x86-64 rework 2002 Andi Kleen.
12 * Does direct fxsave in and out of user space now for signal handlers.
13 * All the FSAVE<->FXSAVE conversion code has been moved to the 32bit emulation,
14 * the 64bit user space sees a FXSAVE frame directly.
19 #include <arch/processor.h>
20 #include <arch/i387.h>
21 #include <arch/sigcontext.h>
22 #include <arch/user.h>
23 #include <arch/ptrace.h>
24 #include <arch/uaccess.h>
26 unsigned int mxcsr_feature_mask __read_mostly = 0xffffffff;
28 void mxcsr_feature_mask_init(void)
32 memset(¤t->arch.thread.i387.fxsave, 0, sizeof(struct i387_fxsave_struct));
33 asm volatile("fxsave %0" : : "m" (current->arch.thread.i387.fxsave));
34 mask = current->arch.thread.i387.fxsave.mxcsr_mask;
35 if (mask == 0) mask = 0x0000ffbf;
36 mxcsr_feature_mask &= mask;
41 * Called at bootup to set up the initial FPU state that is later cloned
44 void __cpuinit fpu_init(void)
46 unsigned long oldcr0 = read_cr0();
47 extern void __bad_fxsave_alignment(void);
49 if (offsetof(struct task_struct, arch.thread.i387.fxsave) & 15)
50 __bad_fxsave_alignment();
51 set_in_cr4(X86_CR4_OSFXSR); /* enable fast FPU state save/restore */
52 set_in_cr4(X86_CR4_OSXMMEXCPT); /* enable unmasked SSE exceptions */
54 write_cr0(oldcr0 & ~((1UL<<3)|(1UL<<2))); /* clear TS and EM */
56 mxcsr_feature_mask_init();
57 /* clean state in init */
58 current->arch.flags = 0;