1 // PCI BIOS (int 1a/b1) calls
3 // Copyright (C) 2008 Kevin O'Connor <kevin@koconnor.net>
4 // Copyright (C) 2002 MandrakeSoft S.A.
6 // This file may be distributed under the terms of the GNU LGPLv3 license.
8 #include "types.h" // u32
9 #include "util.h" // handle_1ab1
10 #include "pci.h" // pci_config_readl
11 #include "bregs.h" // struct bregs
12 #include "biosvar.h" // GET_EBDA
13 #include "pci_regs.h" // PCI_VENDOR_ID
16 extern void entry_bios32(void);
17 extern void entry_pcibios32(void);
19 #define RET_FUNC_NOT_SUPPORTED 0x81
20 #define RET_BAD_VENDOR_ID 0x83
21 #define RET_DEVICE_NOT_FOUND 0x86
22 #define RET_BUFFER_TOO_SMALL 0x89
26 handle_1ab101(struct bregs *regs)
28 regs->al = 0x01; // Flags - "Config Mechanism #1" supported.
29 regs->bx = 0x0210; // PCI version 2.10
30 regs->cl = GET_GLOBAL(MaxPCIBus);
31 regs->edx = 0x20494350; // "PCI "
32 regs->edi = (u32)entry_pcibios32 + BUILD_BIOS_ADDR;
33 set_code_success(regs);
38 handle_1ab102(struct bregs *regs)
40 u32 id = (regs->cx << 16) | regs->dx;
43 while (bus < GET_GLOBAL(MaxPCIBus)) {
46 foreachbdf(bdf, bus) {
47 u32 v = pci_config_readl(bdf, PCI_VENDOR_ID);
53 set_code_success(regs);
57 set_code_invalid(regs, RET_DEVICE_NOT_FOUND);
62 handle_1ab103(struct bregs *regs)
65 u32 classprog = regs->ecx;
67 while (bus < GET_GLOBAL(MaxPCIBus)) {
70 foreachbdf(bdf, bus) {
71 u32 v = pci_config_readl(bdf, PCI_CLASS_REVISION);
72 if ((v>>8) != classprog)
77 set_code_success(regs);
81 set_code_invalid(regs, RET_DEVICE_NOT_FOUND);
84 // read configuration byte
86 handle_1ab108(struct bregs *regs)
88 regs->cl = pci_config_readb(regs->bx, regs->di);
89 set_code_success(regs);
92 // read configuration word
94 handle_1ab109(struct bregs *regs)
96 regs->cx = pci_config_readw(regs->bx, regs->di);
97 set_code_success(regs);
100 // read configuration dword
102 handle_1ab10a(struct bregs *regs)
104 regs->ecx = pci_config_readl(regs->bx, regs->di);
105 set_code_success(regs);
108 // write configuration byte
110 handle_1ab10b(struct bregs *regs)
112 pci_config_writeb(regs->bx, regs->di, regs->cl);
113 set_code_success(regs);
116 // write configuration word
118 handle_1ab10c(struct bregs *regs)
120 pci_config_writew(regs->bx, regs->di, regs->cx);
121 set_code_success(regs);
124 // write configuration dword
126 handle_1ab10d(struct bregs *regs)
128 pci_config_writel(regs->bx, regs->di, regs->ecx);
129 set_code_success(regs);
132 // get irq routing options
134 handle_1ab10e(struct bregs *regs)
136 struct pir_header *pirtable_g = (void*)(GET_GLOBAL(PirOffset) + 0);
138 set_code_invalid(regs, RET_FUNC_NOT_SUPPORTED);
146 } *param_far = (void*)(regs->di+0);
148 // Validate and update size.
149 u16 bufsize = GET_FARVAR(regs->es, param_far->size);
150 u16 pirsize = GET_GLOBAL(pirtable_g->size) - sizeof(struct pir_header);
151 SET_FARVAR(regs->es, param_far->size, pirsize);
152 if (bufsize < pirsize) {
153 set_code_invalid(regs, RET_BUFFER_TOO_SMALL);
158 void *buf_far = (void*)(GET_FARVAR(regs->es, param_far->buf_off)+0);
159 u16 buf_seg = GET_FARVAR(regs->es, param_far->buf_seg);
161 // Memcpy pir table slots to dest buffer.
162 memcpy_far(buf_seg, buf_far
164 , (void*)(pirtable_g->slots) + get_global_offset()
167 // XXX - bochs bios sets bx to (1 << 9) | (1 << 11)
168 regs->bx = GET_GLOBAL(pirtable_g->exclusive_irqs);
169 set_code_success(regs);
173 handle_1ab1XX(struct bregs *regs)
175 set_code_unimplemented(regs, RET_FUNC_NOT_SUPPORTED);
179 handle_1ab1(struct bregs *regs)
183 if (! CONFIG_PCIBIOS) {
189 case 0x01: handle_1ab101(regs); break;
190 case 0x02: handle_1ab102(regs); break;
191 case 0x03: handle_1ab103(regs); break;
192 case 0x08: handle_1ab108(regs); break;
193 case 0x09: handle_1ab109(regs); break;
194 case 0x0a: handle_1ab10a(regs); break;
195 case 0x0b: handle_1ab10b(regs); break;
196 case 0x0c: handle_1ab10c(regs); break;
197 case 0x0d: handle_1ab10d(regs); break;
198 case 0x0e: handle_1ab10e(regs); break;
199 default: handle_1ab1XX(regs); break;
204 /****************************************************************
206 ****************************************************************/
208 // Entry point for 32bit pci bios functions.
210 handle_pcibios32(struct bregs *regs)
212 debug_enter(regs, DEBUG_HDL_pcibios32);
225 struct bios32_s BIOS32HEADER __aligned(16) VAR16EXPORT = {
226 .signature = 0x5f32335f, // _32_
227 .length = sizeof(BIOS32HEADER) / 16,
233 dprintf(3, "init bios32\n");
235 BIOS32HEADER.entry = (u32)entry_bios32;
236 BIOS32HEADER.checksum -= checksum(&BIOS32HEADER, sizeof(BIOS32HEADER));