From d0e259515f278c3dfe9689b9fb67c5d906b42092 Mon Sep 17 00:00:00 2001 From: Alexander Kudryavtsev Date: Mon, 26 Sep 2011 16:23:35 +0400 Subject: [PATCH 18/32] Fix for passed through MSI support --- palacios/src/devices/pci_passthrough.c | 12 ++++++------ 1 files changed, 6 insertions(+), 6 deletions(-) diff --git a/palacios/src/devices/pci_passthrough.c b/palacios/src/devices/pci_passthrough.c index ca2ee7b..11e603d 100644 --- a/palacios/src/devices/pci_passthrough.c +++ b/palacios/src/devices/pci_passthrough.c @@ -969,7 +969,7 @@ static int cfg_msi_passthrough_capability_write(struct vm_device *dev, uint_t re struct msi_info mi; uint32_t pci_addr = state->phys_pci_addr.value & ~0xff; union msi_msg_address *address = state->msi.m.msg_address_lo, phys_address; - union msi_msg_data *data = state->msi.m.msg_data, phys_data; + union msi_msg_data *data = state->msi.m.msg_data; union msi_control *c = state->msi.m.control; // copy guest data. it will be returned to guest when it reads. @@ -992,13 +992,13 @@ static int cfg_msi_passthrough_capability_write(struct vm_device *dev, uint_t re if(msi_passthrough_compose_host_message(dev, address, &phys_address) != 0) return -1; for(i = 0; i < mi.vec_count; ++i) { - v3_hook_irq(dev->vm, phys_data.vector + i, irq_handler, dev); + v3_hook_irq(dev->vm, data->vector + i, irq_handler, dev); } if(c->is_64bit_cap) status |= pci_cfg_write(pci_addr | MSI_CAP_ADDR_HI(msi_cap, 1), 4, 0); status |= pci_cfg_write(pci_addr | MSI_CAP_ADDR_LO(msi_cap), 4, phys_address.val); - status |= pci_cfg_write(pci_addr | MSI_CAP_DATA(msi_cap, c->is_64bit_cap), 2, phys_data.val); + status |= pci_cfg_write(pci_addr | MSI_CAP_DATA(msi_cap, c->is_64bit_cap), 2, data->val); status |= pci_cfg_write(pci_addr | MSI_CAP_CTL(msi_cap), 2, c->val); } else { // MSI disabled, need to reflect it @@ -1012,7 +1012,7 @@ static int cfg_msi_passthrough_capability_write(struct vm_device *dev, uint_t re if(c->is_64bit_cap) status |= pci_cfg_write(pci_addr | MSI_CAP_ADDR_HI(msi_cap, 1), 4, 0); status |= pci_cfg_write(pci_addr | MSI_CAP_ADDR_LO(msi_cap), 4, phys_address.val); - status |= pci_cfg_write(pci_addr | MSI_CAP_DATA(msi_cap, c->is_64bit_cap), 2, phys_data.val); + status |= pci_cfg_write(pci_addr | MSI_CAP_DATA(msi_cap, c->is_64bit_cap), 2, data->val); status |= pci_cfg_write(pci_addr | MSI_CAP_CTL(msi_cap), 2, c->val); } } else if(reg_num == MSI_CAP_ADDR_HI(msi_cap, c->is_64bit_cap)) { @@ -1024,13 +1024,13 @@ static int cfg_msi_passthrough_capability_write(struct vm_device *dev, uint_t re if(msi_passthrough_compose_host_message(dev, address, &phys_address) != 0) return -1; for(i = 0; i < mi.vec_count; ++i) { - v3_hook_irq(dev->vm, phys_data.vector + i, irq_handler, dev); + v3_hook_irq(dev->vm, data->vector + i, irq_handler, dev); } if(c->is_64bit_cap) status |= pci_cfg_write(pci_addr | MSI_CAP_ADDR_HI(msi_cap, 1), 4, 0); status |= pci_cfg_write(pci_addr | MSI_CAP_ADDR_LO(msi_cap), 4, phys_address.val); - status |= pci_cfg_write(pci_addr | MSI_CAP_DATA(msi_cap, c->is_64bit_cap), 2, phys_data.val); + status |= pci_cfg_write(pci_addr | MSI_CAP_DATA(msi_cap, c->is_64bit_cap), 2, data->val); status |= pci_cfg_write(pci_addr | MSI_CAP_CTL(msi_cap), 2, c->val); } } else if (c->mask_cap && reg_num == MSI_CAP_MASK_BITS(msi_cap, c->is_64bit_cap)) { -- 1.7.5.4